NEC IE-703102-MC-EM1, Руководство пользователя

Страница: 21 / 49

CHAPTER 2 NAME AND FUNCTION OF COMPONENTS
21
2.2 Clock Settings
This section describes the clock settings. For JP1 and SW1, refer to Figure 2-1.
Table 2-1. Clock Setting (When the Emulator is Used as a Stand-Alone Unit)
Clock Supply Source Setting Clock Mode Setting
Clock Supply Method JP1 Setting
Note
SW1 Setting (CKSEL Setting)
PLL mode
DIRECT
PLL
Internal clock
Direct mode
1
2
7
8
DIRECT
PLL
Note
Setting any other state is prohibited.
Table 2-2. Clock Setting (When the Emulator is Used in Target System Connection)
Clock Supply Source Setting Clock Mode Setting
Clock Supply Method JP1 Setting
Note 1
SW1 Setting
(CKSEL Setting)
CKSEL Setting of
Target System
PLL mode
DIRECT
PLL
Low level Internal
clock/target
clock
Note 2
Direct mode
1
2
7
8
DIRECT
PLL
High level
Notes 1. Setting any other state is prohibited.
2. Switching the internal clock and target clock is done with the debugger.