NEC DLP CINEMA NC1600C, Руководство по обслуживанию

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8-22
CIRCUIT DESCRIPTION
3. Power
3-1. Power input
The power supplies for three systems are fed through the pins of J17 and J18 as specified below.
12V: J17 #A1, #B1, #C1
This board not used yet; relayed to each FSB
5V: J17 #A9, #A10, #A39, #A40, #B9, #B10, #B39, #B40, #C9, #C10, #C40
J18 #A1, #A2, #A39, #A40, #B1, #B2, #B39, #B40, #C1, #C40
for FPGA, Reset FPGA I/O (5V > 2.5V)
3.3V: J17 #A5, #A6, #A13, #A14, #B5, #B6, #B13, #B14, #B15, #C5, #C6, #C13, #C14, #C15
J18 #B24, #B30, #B31, #B34, #C27
for FPGA, Reset FPGA I/O and Core (3.3V > 1.2V)
Flash, SRAM, PLL, other Reset IC
3-2. Voltage converter
The DC-DC converter (U5 / TPS54610PWP) generates the 1.2V power from 3.3V for the core power
supply of FPGA.
The DC-DC converter (U6 / TPS54810PWP) generates the 2.5V power from 5V for the I/O power supply
of each channel of FPGA and FSB.
3-3. Power output
The power supplies for three systems are fed to the FSB (Formatter Satellite Board) through the pins of
J7 to J9 (Power ON) as specified below.
12V: J7#3, J8#3, J9#3
3.3V: J7#5, J8#5, J9#5
2.5V: J7#1&7, J8#1&7, J9#1&7
* J7: for Red-ch, J8: for Green-ch, J9: for Blue-ch
4. Configuration
Configuration means the behavior of its own in conjunction with the FPGA.
In this system, configuration is carried out as one of the boot events for the FFIB and the FPGA on each FSB.
Therefore, starting becomes impossible if any one of configurations fails for the FPGA.
Configuration sequence after the accomplishment of Power ON:
a. U15 (Reset FPGA / XC3S100E-4TQG144C) is configured by U11 (PROM / XCF01SV0G20C).
After normal completion, the status LED “DS” is lit in green.
b. U15 is used as a configuration controller so that U22 on FFIB and U1 (common to all channels) on FSB
can be configured from U16 (S29GLO64A90TFIR20).
After normal completion, the status LED “D12” is lit in green.
Upon normal completion of configuration on each FSB, the status LED “D2” is lit in green.