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Configuration and Installation Chapter 2
SCXI-1160 User Manual 2-19 © National Instruments Corporation
Table 2-4. SCXIbus to SCXI-1160 Rear Signal Connector to Data Acquisition
Board Pin Equivalences
SCXIbus Line
SCXI-1160 Rear
Signal Connector
MIO-16
Lab-NB/Lab-PC/
Lab-PC+/Lab-LC
PC-LPM-16
DIO-24
DIO-96
DIO-32F
MOSI
D*/A
INTR*
SPICLK
MISO
SERDATIN
DAQD*/A
SLOT0SEL*
SERCLK
SERDATOUT
ADIO0
ADIO1
ADIO2
EXTSTROBE*
BDIO0
PB4
PB5
PB6
PB7
PC1
DOUT4
DOUT5
DOUT6
DOUT7
DIN6
PB3
PB2
PB1
PB0
PA0
APB3
APB2
APB1
APB0
APA0
DIOB3
DIOB2
DIOB1
DIOB0
DIOA0
The following specifications and ratings apply to the digital I/O lines.
Absolute maximum voltage
input rating 5.5 V with respect to DIG GND
Digital input specifications (referenced to DIG GND):
V
IH
input logic high voltage 2 V minimum
V
IL
input logic low voltage 0.8 V maximum
II input current leakage
±
1
µ
A maximum
Digital output specifications (referenced to DIG GND):
V
OH
output logic high voltage 3.7 V minimum at 4 mA maximum
V
OL
output logic low voltage 0.4 V maximum at 4 mA maximum
Timing Requirements and Communication Protocol
Communication Signals
This section describes the methods for communicating on the Serial Peripheral Interface (SPI)
bus and their timing requirements. The communication signals are SERDATIN, DAQD*/A,
SLOT0SEL*, SERDATOUT, and SERCLK. Furthermore, Slot 0 produces SS* according to
data acquisition board programming; therefore SS* timing relationships will also be discussed.
For information on the Slot 0 Slot-Select Register, consult Chapter 4, Register Descriptions.
Use the following data acquisition board determines to which slot it will talk to by writing a slot-
select number to Slot 0. In the case of an SCXI-1001 chassis, this write also determines to which
chassis the data acquisition board will talk.