Chapter 2 Configuration and Installation
© National Instruments Corporation 2-22 SCXI-1160 User Manual
3. Pull DAQD*/A low to deselect the Address Handler and select the register whose address
was written to the Address Handler. This selects a register for writing to or reading from.
Figure 2-10 illustrates a write to the SCXI-1160 Address Handler of the binary pattern:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
This pattern is the address of the Data Register.
SERDATIN
SERCLK
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
DAQD*/A
Tdelay
Tdelay SERCLK last rising edge to DAQD*/A low 425 nsec
Figure 2-10. Address Handler Timing Diagram
After the Address Handler has been written to, an address line of a register has been asserted.
Now you can write to the SCXI-1160 Data Register and read from its Module ID Register or
Status Register using the following protocols. The contents of the Module ID Register are
reinitialized by deasserting Slot-Select. After the 32 bits of data are read from the Module ID
Register, further data will be zeros until reinitialization occurs. The Status Register bit value is
updated at the time the relays switch, and remains low until the relays finish switching.
To write to the Data Register, follow these steps:
1. Initial conditions:
SS* asserted low.
SERDATIN = don't care.
DAQD*/A = 0 (indicates data will be written to a register).
SLOT0SEL* = 1.
SERCLK = 1 (and has not transitioned since DAQD*/A went low).
2. For each bit to be written:
Establish the desired SERDATIN level corresponding to this bit.
SERCLK = 0.
SERCLK = 1. This rising edge clocks the data.
3. Pull DAQD*/A high. This disables further writes to the module Data Register. If you wish,
you can write address FFFF (hexadecimal) to the Address Handler. This selects the Parking
Register and makes the module registers more immune to noise.