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Chapter 1
Getting Started with the cDAQ Controller
modules to your sensors/actuators. C Series modules can sometimes provide isolation from
channel-to-earth ground and channel-to-channel.
For more information about which C Series modules are compatible with the cDAQ controller,
refer to the
C Series Support in NI-DAQmx
document by going to
and entering
the Info Code
rdcdaq
.
Parallel versus Serial DIO Modules
Digital I/O module capabilities are determined by the type of digital signals that the module is
capable of measuring or generating.
•
Serial digital I/O modules are designed for signals that change slowly and are accessed by
either software-timed or hardware-timed reads and writes.
•
Parallel digital I/O modules are for signals that change rapidly and are updated by either
software-timed or hardware-timed reads and writes.
For more information about digital I/O modules, refer to Chapter 4,
cDAQ Module Interface
The cDAQ module interface manages data transfers between the STC3 and the C Series
I/O modules. The interface also handles autodetection, signal routing, and synchronization.
STC3
The STC3 features independent high-speed data streams; flexible AI, AO, and DIO sample
timing; triggering; PFI signals for multi-device synchronization; flexible counter/timers with
hardware gating; digital waveform acquisition and generation; and static DIO.
•
AI, AO, and DIO Sample Timing
—The STC3 contains advanced AI, AO, and DIO
timing engines. A wide range of timing and synchronization signals are available through
the PFI lines. Refer to the following sections for more information about the configuration
of these signals:
–
The
section of Chapter 2,
–
The
section of Chapter 3,
–
The
section of Chapter 4,
–
The
•
Triggering Modes
—The cDAQ controller supports different trigger modes, such as start
trigger, reference trigger, and pause trigger with analog, digital, or software sources. Refer
to the following sections for more information:
–
The
Analog Input Triggering Signals
section of Chapter 2,
–
The
Analog Output Triggering Signals
section of Chapter 3,