NI 5762R User Guide and Specifications
20
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Figure 14.
Analog Input Phase Noise with 100 MHz Input Signal, PLL Off
Internal Sample Clock
Clock distribution part number ..............................AD9511
1
Oscillator type........................................................VCXO
Frequency...............................................................250 MHz
Phase noise
10 kHz offset..................................................–137 dBc/Hz
100 kHz offset................................................–151 dBc/Hz
Internal stability .....................................................±1 ppm
CLK IN
Number of channels ...............................................1, single-ended
Connector type .......................................................SMA
Input impedance.....................................................50
Ω
Input coupling ........................................................AC
Input voltage range ................................................0.63 V
pk-pk
to 2.0 V
pk-pk
Absolute maximum voltage ...................................±3.0 V DC, 3.0 V
pk-pk
AC
1
For additional information about the AD9511, refer to the Analog Devices data sheet at
www.analog.com
.
–80.0
–155.0
10
100
Frequency Offset from Carrier (Hz)
Amplitude (dBc/Hz)
10k
1k
–150.0
–145.0
–140.0
–135.0
–130.0
–125.0
–120.0
–115.0
–110.0
–105.0
–100.0
–95.0
–90.0
–85.0
100k
1M
10M