Block Diagram
3-18
3
ABORT Switch (S1)
The
ABORT
switch is located on the LED mezzanine. When activated
by software, the
ABORT
switch can generate an interrupt signal from
the base board to the processor. The interrupt is normally used to
abort program execution and return control to the debugger
firmware located in the MVME2603/2604 EPROM and Flash
memory. The interrupt signal reaches the processor module via ISA
bus interrupt line IRQ8
∗
. The signal is also available at pin PB7 of
the Z8536 CIO device, which handles various status signals, serial
I/O lines, and counters.
The interrupter connected to the
ABORT
switch is an edge-sensitive
circuit, filtered to remove switch bounce.
Table 3-2. P2 Multiplexing Sequence
MXDO (From Base Board)
MXDI (From MVME761)
Time Slot
Signal Name
Time Slot
Signal Name
0
RTS3
0
CTS3
1
DTR3
1
DSR3/MID1
2
LLB3/MODSEL
2
DCD3
3
RLB3
3
TM3/MID0
4
RTS4
4
RI3
5
DTR4
5
CTS4
6
LLB4
6
DSR4/MID3
7
RLB4
7
DCD4
8
IDREQ
∗
8
TM4/MID2
9
DTR1
9
RI4
10
DTR2
10
RI1
11
Reserved
11
DSR1
12
Reserved
12
DCD1
13
Reserved
13
RI2
14
Reserved
14
DSR2
15
Reserved
15
DCD2
Содержание MVME2603-1121A
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Страница 70: ...System Considerations 1 54 1 ...
Страница 86: ...Programming Considerations 2 16 2 ...
Страница 112: ...Block Diagram 3 26 3 ...
Страница 174: ...Related Specifications A 10 A ...
Страница 178: ...FCC Compliance B 4 B ...
Страница 188: ...Proper Grounding C 10 C ...
Страница 206: ...Glossary GL 14 G L O S S A R Y ...