< Dual-In-Line Package Intelligent Power Module >
Series Application note
Publication Date: September 2016
33
3.1.4 External SC protection circuit with using three shunt resistors
When using three shunt resistor, protection circuit is described as following Fig.3-1-4.
Fig.3-1-4 Interface circuit example
(note)
(1) It is necessary to set the time constant R
f
C
f
of external comparator input so that IGBT stop within 2
μs when short circuit
occurs.
(2) SC interrupting time might vary with the wiring pattern, comparator speed and so on.
(3) The threshold voltage Vref should be set up the same rating of short circuit trip level (Vsc(ref) typ. 0.48V).
(4) Select the external shunt resistance so that SC trip-level is less than specified value.
(5) To avoid malfunction, the wiring A, B and C should be designed as short as possible.
(6) The point D at which patterns are branched to each comparator should be closer to the terminal of shunt resistor.
(7) OR output high level should be more than 0.505V (=maximum Vsc(ref)).
(8) GND of Comparator, GND of Vref circuit and Cf should be connected to control GND wiring. (not to power GND)
3.1.5 Circuits of Signal Input Terminals and Fo Terminal
(1) Internal Circuit of Control Input Terminals
DIPIPM is high-
active input logic. 3.3kΩ(min)
pull-down resistor is built-in each input circuits of
the DIPIPM as shown in Fig.3-1-5 , so external
pull-down resistor is not needed.
Furthermore, the turn-on and turn-off
threshold voltage of input signal are as shown in
Table 3-1-1 .
Fig.3-1-5 Internal structure of control input terminals
Table 3-1-1 Input threshold voltage ratings(Tj=25°C)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Turn-on threshold voltage
Vth(on)
U
P
,V
P,
W
P
-V
NC
terminals,
U
N
,V
N
,W
N
-V
NC
terminals,
AIN-V
NC
terminal
－
－
3.5
V
Turn-off threshold voltage
Vth(off)
0.8
－
－
(note)
(1) The wiring of each input should be patterned as short as possible. If the pattern is long and the noise is imposed on the
pattern (e.g. Fig3-1-6), it may be effective to insert RC filter.
(2) There are limits for the minimum input pulse width in the DIPIPM. The DIPIPM might make no response or delayed
response, if the input pulse width (both on and off) is shorter than the specified value. (Table 3-1-2)
P
V
U
W
N-side IGBT
P-side IGBT
Drive circuit
DIPIPM
V
NC
NW
Drive circuit
CIN
NV
NU
-
Vref
+
Vref
Vref
Comparators
(Open collector output type)
External protection circuit
Protection circuit
Shunt
resistors
R
f
C
f
5V
B
A
C
OR output
D
N1
-
+
-
+
U
P,
V
P
, W
P
DIPIPM
U
N
,V
N
,W
N
AIN
3.3k
Ω(min)
3.3k
Ω(min)
Gate drive
circuit
Gate drive
circuit
Level shift
circuit
