The High Data Rate Modes utilize the same RF channel bandwidth as the IEEE 802.15.4
‑
2006 sub-1 GHz O-QPSK
modes. Higher data rates are achieved by using the modified O-QPSK spreading codes having reduced code
lengths. The lengths are reduced by the factor of two or by the factor of four.
For O-QPSK with 400 kchip/s, this leads to a data rate of 200 kb/s (2-fold) and 400 kb/s (4-fold), respectively.
For O-QPSK with 1000 kchip/s, the resulting data rate is 500 kb/s (2-fold) and 1000 kb/s (4-fold), respectively.
Due to the decreased spreading factor, the sensitivity of the receiver is reduced. The P
SENS
parameter in the
Receiver Characteristics
shows typical values of the sensitivity for different data rates.
7.1.5.2
High Data Rate Frame Structure
In order to allow robust frame synchronization, the AT86RF212B high data rate modulation is restricted to the PSDU
part only. The PPDU header (the preamble, the SFD and the PHR field) are transmitted with a rate of either 100 kb/s
or 250 kb/s (basic rates).
Figure 7-2. High Date Rate Frame Structure
Preamble
SFD
PHR
PSDU
Basic Rate Transmission:
100 kbit/s
250 kbit/s
High Rate Transmission:
{200, 400} kbit/s
{500, 1000} kbit/s
Due to the overhead caused by the PPDU header and the FCS, the effective data rate is less than the selected data
rate, depending on the length of the PSDU.
Consequently, high data rate transmission is useful for large PSDU lengths due to the higher effective data rate, or in
order to reduce the power consumption of the system.
7.1.5.3
High Data Rate Mode Options
Reduced Acknowledgment Time
If the AACK_ACK_TIME bit in the XAM_CTRL_1 register (XAH_CTRL_1.AACK_ACK_TIME) is set, the
acknowledgment time is reduced to the duration of two symbol periods for 200 and 400 kb/s data rates, and to
three symbol periods for 500 and 1000 kb/s data rates. The reduced acknowledgment time is untouched in IEEE
802.15.4. Otherwise, it defaults to 12 symbol periods according to IEEE 802.15.4.
Receiver Sensitivity Control
The different data rates between PPDU header (SHR and PHR) and PHY payload (PSDU) cause a different
sensitivity between header and payload. This can be adjusted by defining sensitivity threshold levels of the
receiver. With a sensitivity threshold level set, the AT86RF212B does not synchronize to frames with an RSSI level
below that threshold. The sensitivity threshold is configured by the RX_PDT_LEVEL bits in the RX_SYN register
(RX_SYN.RX_PDT_LEVEL).
Scrambler
For data rates 400 kb/s and 1000 kb/s, additional chip scrambling is applied default in order to mitigate data
dependent spectral properties. Scrambling can be disabled if the OQPSK_SCRAM_EN bit in the TRX_CTRL_2
register (TRX_CTRL_2.OQPSK_SCRAM_EN) is set to ‘
0
’.
Energy Detection
The Energy Detection (ED) measurement time span is eight symbol periods according to IEEE 802.15.4. For frames
operated at a higher data rate, the automated measurement duration is reduced to two symbol periods taking
reduced frame durations into account. This means, the ED measurement time is 80 µs for modes 200 kb/s and 400
kb/s, and 32 µs for modes 500 kb/s and 1000 kb/s. For manually initiated ED measurements in these modes, the
measurement time is still eight-symbol periods.
Carrier Sense
For clear channel assessment, IEEE 802.15.4-2006 specifies several modes which may either apply “energy above
threshold” or “carrier sense” (CS) or a combination of both. Since signals of the High Data Rate Modes are not
compliant to IEEE 802.15.4-2006, CS is not supported when the AT86RF212B is operating in these modes. However,
“energy above threshold” is supported.
Link Quality Indicator (LQI)
ATSAMR30M18A
Module Description
©
2018-2021 Microchip Technology Inc.
and its subsidiaries
Datasheet
DS70005384B-page 19
