22
LatticeXP2 Advanced
Lattice Semiconductor
Evaluation Board User’s Guide
4-Input ADC
U3 is the quad ADC (Analog to Digital Converter) ADS7842 IC. The four analog inputs AIN0 to AIN3 are RC filtered
versions of the external analog signals applied at J10. The full scale values for the ADC inputs will match that of the
AREF signal described below. AIN3 is also tied to VR1 to allow user adjustment of a set DC value based on the
AREF signal described below. The connections between the ADC pins and LatticeXP2 balls are shown in Table 30.
30
GND
Vss
System ground
GND
31
AD[18]
I/O
PCI address and data bit 18
V8
32
AD[16]
I/O
PCI address and data bit 16
U9
33
+3.3V
Vcc
3.3V voltage supply pin
+3.3V
34
FRAME#
I/O
PCI interface control FRAME# signal
W9
35
GND
Vss
System ground
GND
36
TRDY#
I/O
PCI interface control TRDY# signal
T8
37
GND
Vss
System ground
GND
38
STOP#
I/O
PCI interface control STOP# signal
T11
39
+3.3V
Vcc
3.3V voltage supply pin
+3.3V
40
Reserved
—
Reserved
—
41
Reserved
—
Reserved
—
42
GND
Vss
System ground
GND
43
PAR
I/O
PCI address and data PAR signal
U10
44
AD[15]
I/O
PCI address and data bit 15
U11
45
+3.3V
Vcc
3.3V voltage supply pin
+3.3V
46
AD[13]
I/O
PCI address and data bit 13
AB8
47
AD[11]
I/O
PCI address and data bit 11
AB9
48
GND
Vss
System ground
GND
49
AD[9]
I/O
PCI address and data bit 9
AB10
52
C/BE#[0]
I/O
PCI bus command, byte enable, bit 0
AA10
53
+3.3V
Vcc
3.3V voltage supply pin
+3.3V
54
AD[6]
I/O
PCI address and data bit 6
Y11
55
AD[4]
I/O
PCI address and data bit 4
W11
56
GND
Vss
System ground
GND
57
AD[2]
I/O
PCI address and data bit 2
AB15
58
AD[0]
I/O
PCI address and data bit 0
AA12
59
+VIO
Vio
VIO voltage supply pin
—
60
REQ64#
I/O
PCI 64-bit request transfer pin
—
61
+5V
Vcc
5V voltage supply pin
—
62
+5V
Vcc
5V voltage supply pin
—
Table 29. PCI Connector Solder Side (Continued)
J56 Pin#
Signal
I/O
Description
LatticeXP2 Connection