Lattice Semiconductor LatticeMico32/DSP, Руководство пользователя

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LatticeMico32/DSP Development Board
Lattice Semiconductor User’s Guide
Table 4. DDR SODIMM Socket (X4) - Address Bus
Table 5. DDR SODIMM Socket (X4) - Other Signals
Ethernet Interface
An Intel LXT971A is included for Ethernet PHY. This is an IEEE-compliant Fast Ethernet PHY Transceiver that
directly supports both 100BASE-TX and 10BASE-T applications, full and half duplex. For more information, please
refer to the data sheet of this component.
Table 6. Ethernet Controller U0801 Pin Definition
19 DDR DQ8 B22 55 DDR DQ24 F22
23 DDR DQ9 B21 59 DDR DQ25 G22
29 DDR DQ10 C21 65 DDR DQ26 H22
31 DDR DQ11 C22 67 DDR DQ27 H21
20 DDR DQ12 E20 56 DDR DQ28 K19
24 DDR DQ13 E18 60 DDR DQ29 K18
30 DDR DQ14 F19 66 DDR DQ30 L18
32 DDR DQ15 F18 68 DDR DQ31 L19
Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin
112 DDR A0 D16 111 DDR A1 C16
110 DDR A2 E15 109 DDR A3 D15
108 DDR A4 C15 107 DDR A5 E14
106 DDR A6 D14 105 DDR A7 C14
102 DDR A8 E13 101 DDR A9 D13
115 DDR A10 E16 100 DDR A11 C13
99 DDR A12 B13 123 DDR A13 C17
117 DDR BA0 E17 116 DDR BA1 D17
Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin
35 DDR CK0+ B12 37 DDR CK0- A12
160 DDR CK1+ A20 158 DDR CK1- B19
96 DDR CKE0 A13 95 DDR CKE1 C12
118 DDR RAS# C18 119 DDR WE# D18
120 DDR CAS# A19 121 DDR S0# C19
Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin
4 HPE RESOUT# H6 42 ETH MDIO K4
43 ETH MDC K5 45 ETH RXD3 F2
46 ETH RXD2 G3 47 ETH RXD1 G2
48 ETH RXD0 G1 49 ETH RXDV J4
52 ETH RXCLK K1 53 ETH RXER J5
54 ETH TXER J2 55 ETH TXEN J3
56 ETH TXCLK J1 57 ETH TXD0 H1
58 ETH TXD1 H2 59 ETH TXD2 H3
60 ETH TXD3 H4 62 ETH COL K2
63 ETH CRS K3 64 ETH MDINTR# F1
Table 3. DDR SODIMM Socket (X4) - Data Bus, n.c. ... Not Connected (Continued)