background image

35

LatticeMico32/DSP Development Board

Lattice Semiconductor

User’s Guide 

Figure 13. 

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

VCCP

L

L

EC

_

T

D

O

JTA

G

_

D

O

N

E

S

ISPI

CSS

P

IN

CF

G

2

CF

G

1

CF

G

0

JT

A

G

_

IN

IT

EC_TDI

EC_TMS

SP

ID

O

CC

L

K

PROGRAM#

M

A

C

H

X

O

_

IO[6

:0

]

M

A

CHX

O

_CLK0

GP_

A

D

R

8

USBCF_W

A

K

E

U

SBCF_P

USB

C

F

_

M

U

S

BCF_I

2

C_SDA

U

S

BCF_I

2

C_SCL

USB

_

C

L

K

_

O

G

P

_I

N

T

0

G

P

_I

N

T

1

GP_BKPT

G

P

_CTL5

G

P

_CTL0

G

P

_CTL1

G

P

_CTL2

G

P

_CTL4

G

P

_CTL3

G

P

_SLOE

GP_

W

U

2

GP

_

F

IF

O

A

D

R

0

GP

_

F

IF

O

A

D

R

1

GP_

IF

C

L

K

GP_PKTEND

GP

_

S

L

C

S

#

GP_T0

GP_T1

GP_T2

GP_

R

D

Y

0

GP_

R

D

Y

1

GP_

R

D

Y

2

GP_

R

D

Y

3

GP_

R

D

Y

4

GP_

R

D

Y

5

G

P

_R

X

D

0

GP_TXD0

G

P

_R

X

D

1

GP_TXD1

G

P

_D

0

G

P

_D

1

G

P

_D

2

G

P

_D

3

G

P

_D

4

G

P

_D

5

G

P

_D

6

G

P

_D

7

G

P

_D

8

G

P

_D

9

G

P

_D

10

GP

_

D

1

1

G

P

_D

12

GP

_

D

1

3

G

P

_D

14

GP

_

D

1

5

GP_

A

D

R

0

GP_

A

D

R

1

GP_

A

D

R

2

GP_

A

D

R

3

GP_

A

D

R

4

GP_

A

D

R

5

GP_

A

D

R

6

GP_

A

D

R

7

J

TAG

_TCK

JTAG_TMS

J

TAG

_TDI

J

TAG

_TDO

J

TAG

_PROG

JTAG_TRST

JTA

G

_

D

O

N

E

J

TAG

_

IN

IT

DO

U

T

BB3V3_I

O

[1

1

:0

]

A

A

3V3_I

O

1

A

A

3V3_I

O

2

1

A

A

3V3_I

O

2

0

A

A

3V3_I

O

1

9

AA

3

V

3

_

IO

2

A

A

3V3_I

O

3

AA

3

V

3

_

IO

0

A

A

3V3_I

O

1

8

EC

_

T

C

K

JTA

G

_

D

O

N

E

CF

G

0

PROGRAM#

CF

G

1

CF

G

2

JT

A

G

_

IN

IT

A

A

3V3_I

O

7

A

A

3V3_I

O

8

A

A

3V3_I

O

9

A

A

3V3_I

O

1

0

A

A3V3_I

O

1

1

A

A

3V3_I

O

1

2

AA

3

V

3

_

IO

1

3

AA

3

V

3

_

IO

1

4

A

A

3V3_I

O

4

A

A

3V3_I

O

1

7

A

A

3V3_I

O

6

AA

3

V

3

_

IO

1

5

A

A

3V3_I

O

5

A

A3V3_I

O

1

6

JTAG_TMS

GPIO_TMS

I

D

T

_

C

E

I

D

T

_

O

X

H

C

A

M

I

D

T

_

G

A

T

JG

P

IO

_

T

D

O

O

D

T

_

C

E

O

D

T

_

O

X

H

C

A

M

O

D

T

_

G

A

T

JG

P

IO

_

T

D

I

K

C

T

_

C

E

K

C

T

_

O

X

H

C

A

M

K

C

T

_

G

A

T

JG

P

IO

_

T

C

K

A

A

3V3_I

O

1

A

A

3V3_I

O

2

A

A

3V3_I

O

3

A

A

3V3_I

O

4

USB_

S

D

A

M

A

C

H

X

O

_IO6

USB_

S

C

L

A

A

3V3_I

O

6

A

A

3V3_I

O

7

A

A

3V3_I

O

8

A

A

3V3_I

O

9

A

A

3V3_I

O

10

A

A

3V3_I

O

1

1

A

A

3V3_I

O

12

A

A

3V3_I

O

13

A

A

3V3_I

O

14

A

A

3V3_I

O

0

M

A

C

H

X

O

_IO0

M

A

C

H

X

O

_IO1

M

A

C

H

X

O

_IO2

M

A

C

H

X

O

_IO3

M

A

C

H

X

O

_IO4

M

A

C

H

X

O

_IO5

G

P

_R

X

D

0

GP_TXD0

G

P

_R

X

D

1

GP_TXD1

GP_BKPT

A

A

3V3_I

O

15

A

A

3V3_I

O

5

A

A

3V3_I

O

16

A

A

3V3_I

O

17

A

A

3V3_I

O

18

G

P

_

A

DR6

G

P

_

A

DR7

G

P

_

A

DR8

HPE_RESET#

G

P

_D

0

G

P

_D

1

G

P

_D

2

G

P

_D

3

G

P

_D

4

G

P

_D

5

G

P

_D

6

G

P

_D

7

G

P

_D

8

G

P

_D

9

GP

_

D

1

0

GP_T1

GP_T2

GP_T0

G

P

_CTL3

GP

_

C

T

L

2

GP

_

C

T

L

1

G

P

_CTL0

GP_

R

D

Y

0

GP_

R

D

Y

1

GP_

R

D

Y

2

GP_

R

D

Y

3

GP_

R

D

Y

4

GP_

R

D

Y

5

GP

_

C

T

L

5

GP

_

C

T

L

4

GP

_

D

1

1

GP

_

D

1

2

GP

_

D

1

3

GP

_

D

1

5

GP

_

D

1

4

G

P

_

A

DR0

G

P

_

A

DR1

G

P

_

A

DR2

G

P

_

A

DR3

G

P

_

A

DR4

G

P

_

A

DR5

A

A

3V3_I

O

19

G

P

_SLOE

GP_

W

U

2

GP

_

F

IF

O

A

D

R

0

G

P

_

F

IF

OADR1

GP_PKTEND

USB

_

C

L

K

_

O

M

A

C

HXO_TMS

M

A

CHX

O

_SLEEPN

GP

_

IN

T

1

GPI

O

_

T

D

I

GP

IO

_

T

D

O

GPIO_TMS

USBCF_W

A

K

E

GP

_

IN

T

0

GP

IO

_

T

C

K

U

S

BCF_I

2

C_SDA

U

S

BCF_I

2

C_SCL

J

TAG

_PROG

JTAG_TRST

JTA

G

_

D

O

N

E

JT

A

G

_

IN

IT

M

A

C

H

X

O

_TDI

M

A

CHXO_TDO

M

A

CHXO_TCK

M

A

C

HXO_TMS

EC_TMS

C

L

K_M

ACHXO

GP

_

IF

C

L

K

G

P

_SLCS#

M

A

CHX

O

_CLK0

C

L

K_M

A

CHXO

A

A

3V3_I

O

2

0

A

A

3V3_I

O

21

E

X

P

C

O

N

_I

O

4

0

E

X

P

C

O

N

_I

O

3

9

EX

P

C

O

N

_

IO

4

1

E

X

P

C

O

N

_I

O

4

3

EX

P

C

O

N

_

IO

4

4

EX

P

C

O

N

_

IO

4

2

B

B

3V3_I

O

3

B

B

3V3_I

O

2

B

B

3V3_I

O

1

B

B

3V3_I

O

0

E

X

P

C

O

N

_

IO[4

5

:0

]

SP

ID

O

SI

S

P

I

CC

L

K

CSS

P

IN

HO

L

D

#

WP

#

WP

#

HPE_RESET#

U

SBCF_P

USB

C

F

_

M

PW

R_

IN

HPE_RESET#

USB_

S

C

L

USB_

S

D

A

VCC3

V

3

GN

D

VCC1

V

2

VCC3

V

3

VCC3

V

3

GN

D

VCC3

V

3

V

C

C3

V3

_

C

ONF

GND

A

_

C

O

N

F

GN

D

G

N

DA

_

C

O

N

F

G

ND

P

VCC3

V

3

GN

D

GN

D

GN

D

VCC3

V3

V

C

C3

V3

_

C

ONF

G

N

D

A

_

C

ONF

G

N

D

G

N

D

A_

CONF

VCC3

V

3

GN

D

VCC3

V

3

GN

D

GN

D

VCC3

V3

GN

D

GN

D

G

N

D

VCC2

V5

VCC3

V

3

GN

D

VCC2

V

5

GN

D

VCC2

V

5

GN

D

GN

D

GN

D

GN

D

VCC3

V3

GN

D

VCC3

V3

GN

D

GN

D

VCC3

V

3

VCC3

V

3

GN

D

VCC3

V

3

GN

D

VCC3

V

3

VCC3

V

3

GN

D

VCC3

V

3

M

A

C

H

XO

_I

O

[6:

0]

2

M

A

CHX

O_CLK0

2

BB3V3_I

O

[1

1

:0

]

2,

9

C

L

K_M

A

CHXO

6

E

X

P

C

O

N

_

IO

[45:

0

]

2,

9

HPE_RESET#

2,

6

USB_S

C

L

7

USB_

S

D

A

7

:t

e

e

h

S

:t

c

ej

or

P

Aut

h

or

s:

Re

v

is

io

n

:

Cre

a

te

d

:

Las

t m

o

d

if

ie

d

:

IF

W

:

of

Page

f

n

o

C

_

A

G

P

F

_

3

0

12

3

SPI Flash 

fo

r

C

o

nf

iguration

Lattice LFEC33 FPGA (Configuration)

Of

fp

age

M25P80VMW6P

8-megabit

P

l

a

c

e

 t

h

e

 4

k

7

 resistors

c

l

o

s

e

 t

o

 t

h

eir 

clock 

l

i

n

e

 t

o

 k

e

e

p

 the 

stub 

l

e

n

g

t

h

 a

s

 

short 

as 

possi

ble.

US

B

-J

T

A

G

 P

ro

g

ra

m

m

er 

Connector

USB Periph

e

r

a

l

for Configur

a

t

i

o

n

JTAG Conne

c

t

o

r

for Configur

a

t

i

o

n

Sternpunkt an

 

X

2

CCL

K

Testpad Area (RM2.54) of Mach

X

O

0

-

CFG

2

-

Slave P

arallel

Mod

e

0

0

I

N

IT#

1

1

1

1

DON

E

1

1

S

P

I

 M

aster

1

0

0

0

0

S

P

I

X

 M

aster

Dra

i

n

P

R

O

G

RAM#

S

l

a

v

e

Serial

1

-

Configuration Settings

Sou

r

c

e

i

s

p

JTAG

SOT-2

3

CFG

0

0

M

a

s

t

e

r

Serial

1

0

Master P

arallel

Gate

CFG

1

GSR

N

1%

DOU

T

TP0319

R0

3

0

2

10K0

1

2

TP0318

+

C0

3

2

4

4u70

1

2

LD

03

0

3

L

E

D y

e

llo

w

TP0337

TP0332

TP0303

F

B

0302

BLM

18PG

600SN1

12

TP0325

TP0324

TP0349

100n

C0

3

0

9

R

0

315

4k70

1

2

TP0338

TP0333

TP0310

100n

C0

3

0

4

RJ

0

3

0

4

0R

00

1

2

TP0343

TP0330

TP0354

TP0339

TP0334

TP0316

100n

C0

3

2

2

TP0301

R

0

301

4k70

1

2

TP0348

100n

C0

3

1

0

1n00

C0

3

1

5

R

0

314

10K0

1

2

R0

3

0

6

470R

1

2

12p0

C0

3

3

9

TP0340

TP0335

TP0322

100n

C0

3

0

3

TP0308

8 Megabi

t

SPI Flas

h

U0

3

0

5

M25P80VMW6P

CS

1

DO

2

WP

3

GND

4

VCC

8

HOLD

7

CLK

6

DI

5

TP0306

T0301

BSS138/SOT

10

0

n

C0

3

0

2

TP0341

TP0336

TP0328

100n

C0

3

1

1

TP0314

TP0351

RJ

0

3

0

2

0R

00

1

2

TP0342

TP0346

100n

C0

3

1

4

12

p

0

C0

3

4

0

RJ

0

3

0

3

nb_10K0

1

2

TP0320

1n

0

0

C0

3

0

1

RJ

0

3

0

5

nb_10K0

1

2

LD

03

0

1

LED

 b

lu

e

100n

C0

3

1

6

100n

C0

3

1

9

TP0304

X2

U

S

B Per

iphe

ra

l

VCC

1

DATA-

2

DATA+

3

GND

4

SHIELD

5

SHIELD

6

100n

C0

3

1

2

R0

3

0

7

4k70

1

2

TP0326

R0

3

1

7

10K0

1

2

S

W

0302

C

A

S-

120A

A

1

B

3

C

2

TP0311

Q

0301

24MHz

1

2

TP0359

T0302

BSS138/SOT

F

B

0301

BLM

18BD

6

01SN1

1

2

TP0344

TP0353

TP0350

RJ

0

3

0

1

nb_10K0

1

2

1n00

C0

3

2

3

TP0317

R0

3

0

4

10K0

1

2

TP0302

100n

C0

3

1

7

CONFIGURATI

O

N

POWER SUPP

L

Y

U

0

201E

L

F

E

C

P

/EC

33-

4

84BG

A

CSN/PB35B

U12

CS1N/PB34B

U11

WRITEN/PB34A

Y12

DI/CSSPIN/PR54B

V21

DOUT/CSON/PR54A

W22

BUSY/SISPI/PR53B

U21

PR53A/SPID0/D7

V22

CFG2

T19

CFG1

U19

CFG0

U18

PROGRAMN

V18

CCLK

T20

INITN

T21

DONE

R20

XRES

L3

PB40B/SPID2/D5

V14

PB38B/SPID4/D3

V13

PB37B/SPID6/D1

AB12

PB41B/SPID1/D6

AB13

PB39B/SPID3/D4

U14

PB37A/SPID5/D2

AA12

PB36B/SPID7/D0

U13

TCK

T5

TDI

U5

TMS

T4

TDO

U1

VCCJ

U2

VCCAUX

G15

VCCAUX

G16

VCCAUX

G7

VCCAUX

G8

VCCAUX

H16

VCCAUX

H7

VCCAUX

R7

VCCAUX

R16

VCCAUX

T15

VCCAUX

T16

VCCAUX

T7

VCCAUX

T8

VCCPLL

J17

VCCPLL

J6

VCCPLL

P6

VCCPLL

P17

NC

A2

NC

AB2

NC

A21

GPIO

Y21

R0

3

1

6

10K0

1

2

TP0323

TP0309

TP0355

100n

C0

3

1

3

TP0329

TP0327

100n

C0

3

2

0

S

W

0301

B

3

FS-

1

010P

1

3

2

4

TP0347

100n

C0

3

0

8

TP0315

TP0357

TP0307

100n

C0

3

1

8

R

030

8

330R

1

2

TP0305

TP0356

RJ

0

3

0

6

0R

00

1

2

100n

C0

3

2

1

BANK 0/0,

1

B

ANK 1/2,

3

BANK 2/4,

5

B

ANK 3/6,

7

U0

3

0

2

M

A

CX

O

-640/

1200-

1

32csBGA

PL2A

B1

PL2B/PL3C

C1

PL3A/PL3D

C3

PL3B/PL4B

D1

PL3D/PL4C

D3

PL5A/PL6A

E2

VCCIO1/VCCIO3

L12

(GSRN) PL5B/PL6B

E3

PB5D/PB7C

N8

PB5B/PB7B (PCLKT)

M7

PB5A/PB6F

N7

SLEEPN

N12

PB6A/PB7D

P8

PB6B/PB7F (PCLKT)

M8

PB4F/PB6A

M6

PB4E/PB5C

N6

VCC

P6

PB3B

M4

PB3C/PB4A

N4

GND

F1

VCCIO3/VCCIO7

D2

PL9B/PL12A

K2

PB2C

M3

PB2D

N3

PL7C/PL10B

H1

PL8A/PL11B

J1

PL9A/PL11D

J3

VCCIO1/VCCIO2

E12

VCCIO3/VCCIO6

K3

PL5D/PL6D

F2

PL6B/PL7C

F3

PL7A/PL8D

G3

PL7B/PL10A

H2

PR3C/PR4A

D12

PR4D/PR6A

F12

PR4C/PR5B

E13

PR2B/PR3C

C13

VCCIO0/VCCIO1

B11

PR2A/PR2A

A14

PT9C/PT10F

B12

PT5B/PT6F (PCLKT)

C8

PT5A/PT6D

B7

PT6B/PT7D (PCLKT)

A8

PT6A/PT7B

B8

PT4D/PT5D

A6

PT4C/PT5C

B6

GND

P9

PT3D/PT4B

A5

VCCAUX

P7

VCC

H3

PT3B/PT3D

A4

VCCIO0/VCCIO0

C5

VCCIO2/VCCIO4

M10

PT2F/PT3C

C4

PT2D/PT3B

A3

PT2C/PT2B

A2

PT2B/PT3A

B3

PT2A

A1

PR11A/PR15A

M12

PR10B/PR14B

M13

PR8B/PR11B

K12

PR8A/PR11A

J13

PR10A/PR14A

L14

PR7C/PR10B

J12

PR7B/PR10A

H14

PR7A/PR9B

H13

PR6B/PR8A

G14

VCCIO2/VCCIO5

N2

PR8D/PR12B

K14

PR5D/PR6C

F14

PR5C/PR6B

F13

PR8C/PR12A

K13

PR6D/PR9A

H12

PR4B/PR5A

E14

PR6C/PR8B

G13

PR3D/PR4B

D14

VCC

G12

VCC

C7

GND

J14

GND

C9

GNDIO0/GNDIO1

A10

GNDIO0/GNDIO0

B4

GNDIO1/GNDIO3

L13

GNDIO1/GNDIO2

D13

GNDIO2/GNDIO5

P2

GNDIO2/GNDIO4

N11

GNDIO3/GNDIO7

E1

GNDIO3/GNDIO6

L2

PL2C/PL2B

B2

PL2D/PL4A

C2

PL6C/PL7D

G1

PL6D/PL8C

G2

(TSALL) PL8C/PL11C

J2

PL9C/PL12B

K1

PL10B/PL14B

L3

PL10A/PL14A

L1

PL11A/PL15A

M1

PL11B/PL16A

N1

PL11C/PL15B

M2

PL11D/PL16B

P1

PB3D/PB4B

P5

PB7A/PB9A

N9

PB7B/PB9B

M9

PB7E/PB9C

N10

PB7F/PB9D

P10

PB8C/PB10A

P11

PB8D/PB10B

M11

PB9C/PB10C

P12

PB9D/PB11C

P13

PB9F/PB11D

P14

TMS

P3

TCK

P4

TDO

N5

TDI

M5

PT3E/PT5A

B5

PT3F/PT5B

C6

PT7B/PT9B

B9

PT7E/PT9E

C10

PT7F/PT9F

B10

PT8C/PT10C

C11

PT7A/PT9A

A9

PT9A/PT10D

A11

PT9B/PT11A

C12

PT9D/PT11C

B13

PT9F/PT11D

A13

PT9E/PT11B

A12

PR2C/PR2B

B14

PR2D/PR3D

C14

PR11B/PR16A

N13

PR11C/PR15B

M14

PR11D/PR16B

N14

VCCAUX

A7

LD

03

0

2

LED

 r

e

d

TP0321

R

0

303

4k70

1

2

TP0313

TP0312

TP0358

U0

3

0

1

C

Y

7

C

6

8

0

1

3A_TQ

F

P100

VCC

1

VCC

33

VCC

38

VCC

49

VCC

53

VCC

66

VCC

78

VCC

85

VCC

20

GND

2

GND

21

GND

39

GND

48

GND

50

GND

65

GND

75

GND

94

GND

99

AVCC

16

AGND

19

AGND

12

AVCC

9

PA0/INT0

67

PA1/INT1

68

PA2/SLOE

69

PA3/WU2

70

PA4/FIFOADR0

71

PA5/FIFOADR1

72

PA6/PKTEND

73

PA7/FLAGD/SLCS

74

PB0/FD0

34

PB1/FD1

35

PB2/FD2

36

PB3/FD3

37

PB4/FD4

44

PB5/FD5

45

PB6/FD6

46

PB7/FD7

47

PD0/FD8

80

PD1/FD9

81

PD2/FD10

82

PD3/FD11

83

PD4/FD12

95

PD5/FD13

96

PD6/FD14

97

PD7/FD15

98

PC0/GPIFADR0

57

PC1/GPIFADR1

58

PC2/GPIFADR2

59

PC3/GPIFADR3

60

PC4/GPIFADR4

61

PC5/GPIFADR5

62

PC6/GPIFADR6

63

PC7/GPIFADR7

64

PE0/T0OUT

86

PE1/T1OUT

87

PE2/T2OUT

88

PE3/RXD0OUT

89

PE4/RXD1OUT

90

PE5/INT6

91

PE6/T2EX

92

PE7/GPIFADR8

93

RDY0/SLRD

3

RDY1/SLWR

4

RDY2

5

RDY3

6

RDY4

7

RDY5

8

XTALIN

11

XTALOUT

10

RESET

77

NC

13

NC

14

NC

15

RESERVED

27

DPLUS

17

DMINUS

18

CTL0/FLAGA

54

CTL1/FLAGB

55

CTL2/FLAGC

56

CTL3

51

CTL4

52

CTL5

76

INT4

22

INT5

84

T0

23

T1

24

T2

25

WAKEUP

79

RXD0

41

TXD0

40

RXD1

43

TXD1

42

SCL

29

SDA

30

BKPT

28

CLKOUT

100

IFCLK

26

RD

31

WR

32

TP0331

TP0345

X3

CO

N

1

0

1

2

3

4

5

6

7

8

9

10

R0

3

0

5

470R

1

2

+

C0

3

0

7

2u20

1

2

TP0352

Содержание LatticeMico32/DSP

Страница 1: ...October 2007 Revision EB17_01 4 LatticeMico32 DSP Development Board User s Guide ...

Страница 2: ...LOAD cable for programming the FPGA Flywire connector for programming using an ispDOWNLOAD cable available separately 9 pin RS232 serial port 230 Kbps 15 pin VGA 64 color encoding Ethernet 10 100 M full half duplex Two USB 2 0 compatible host connectors One USB 2 0 compatible target connector One USB OTG On the Go connector Expansion connector with 46 user I Os 12x12 prototyping area for the integ...

Страница 3: ...number of example and demonstration programs are available for the LatticeMico32 DSP Development board Check the Lattice web site at www latticesemi com boards and navigate to the correct board to find additional documentation and design and programming files Note Unless described otherwise positional statements left right etc refer to the board positioned in front of you so that the key pad is in...

Страница 4: ...d the LED7SegsTest project The LED7SegsTest mem and LED7SegsTest bit files are included in the LED7SegsTest project Visual indications of operation are Left to Right and Right to Left scanning of the 8 LEDs Upcount and roll over of the 7 segment displays from 0 to 99 decimal at 1 second intervals LCD Backlight X5 Jumper Open Backlight is off Configuration Switch TMS Switch Off Down LatticeECP33 de...

Страница 5: ... audio codec TLV320AIC23BIPW from Texas Instruments LCD Contrast Potentiometer Microphone Input Audio Line In Line Out LCD Connector X6 Ethernet 10 100M 3 3V Testpoint 2 5V Testpoint GND Testpoint 1 2V Testpoint CLK Testpoint Flywire Connector X3 High Speed USB for Configuration DIP Switch for the Configuration X5 X13 X12 Expansion Connector DDR SDRAM Socket X4 USB Host Connector Mini USB OTG Conn...

Страница 6: ...ata bus are not connected Thus only half of the capacity of the memory module is available The DDR SODIMM socket is factory configured to provide a regulated 2 5V DDR400 modules require a power supply of 2 6V 0 1V To support DDR400 you must short circuit pins 2 and 3 of connector X18 Position 1 2 is used for 2 5V mode If you have your board in front of you so that the power supply is in the upper ...

Страница 7: ... DQ31 L19 Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin 112 DDR A0 D16 111 DDR A1 C16 110 DDR A2 E15 109 DDR A3 D15 108 DDR A4 C15 107 DDR A5 E14 106 DDR A6 D14 105 DDR A7 C14 102 DDR A8 E13 101 DDR A9 D13 115 DDR A10 E16 100 DDR A11 C13 99 DDR A12 B13 123 DDR A13 C17 117 DDR BA0 E17 116 DDR BA1 D17 Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin 35 DDR CK0 B12 37 DDR CK0 A12 160 DDR CK1 A20...

Страница 8: ...14 15 EXPCON IO40 U13 16 EXPCON IO41 U12 17 EXPCON IO42 U11 18 EXPCON IO43 V14 19 EXPCON IO44 V13 20 EXPCON IO45 W13 21 VCC5V0 22 GND 23 VCC2V5 24 GND 25 VCC3V3 26 GND 27 VCC3V3 28 GND 29 EXPCON OSC 30 GND 31 EXPCON CLKIN 32 GND 33 EXPCON CLKOUT 34 GND 35 VCC3V3 36 GND 37 VCC3V3 38 GND 39 VCC3V3 40 GND Table 8 Expansion Connector X13 Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin 1 HPE RESET 2 ...

Страница 9: ...m the Lattice web site at www latticesemi com ispvm Note Do not change the switch when the configuration of a device is in progress Note The board as configured from the factory has a built in USB ispDOWNLOAD cable The built in cable and an external ispDOWNLOAD cable cannot be used at the same time Table 9 ispDOWNLOAD Connector X3 Pin Definition High Speed LVDS Connector On the right side of the b...

Страница 10: ... Table 11 LCD Connector X6 Pin Definition Serial Interface The board includes an RS232 serial interface port The interface provides transmit TX receive RX and hard ware handshaking The MAXIM MAX3232 data sheet provides detailed information on the interface circuit A 9 pin female to 9 pin female null modem cable is required Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin 1 HSCON DAT0 E21 2 HSCON ...

Страница 11: ...USB Host Peripheral Controller U0702 This controller is compliant with the Universal Serial Bus Specification 2 0 You can transmit and receive serial data at both full speed 12 Mbps and low speed 1 5 Mbps data rates For more information please refer to the data sheet of the USB controller U0703 and U0704 are USB power control switches which must be enabled by the user via the USB PWEN signals The ...

Страница 12: ...ly use the built in ispDOWNLOAD cable or an external ispDOWNLOAD cable exclusively It is not recommended to switch between cables without first power cycling the board Failure to follow this recommenda tion may cause unpredictable results and may possibly damage the board Pin Signal Name FPGA Pin Pin Signal Name FPGA Pin U0703 1 USB PWEN0 B2 U0703 2 USB OC0 E1 U0703 4 USB PWEN1 C2 U0703 3 USB OC1 ...

Страница 13: ...rstand the SYNC frequencies of the VGA monitor being connected to the VGA plug and adjust the FPGA frequencies as required Table 16 VGA Connector X1B Pin Definition n c Not Connected Figure 5 VGA Connector 56 GP CTL2 C2 51 GP CTL3 C1 52 GP CTL4 B2 76 GP CTL5 B1 23 GP T0 M2 24 GP T1 N1 25 GP T2 P1 28 GP BKPT F12 100 USB CLK O M7 26 GP IFCLK M8 41 GP RXD0 E13 40 GP TXD0 E14 43 GP RXD1 F13 42 GP TXD1...

Страница 14: ...he position of the user interface elements Figure 6 User Interface Features 2 5 V LED green 3 3 V LED green FPGA Configuration LED blue FPGA Initialization LED red Single Step Key Reset Key 3 x 4 Keyboard 7 Segment Display 8 LEDs with Testpads LCD Connector Program Key Program LED yellow 4 x DIP Switches ...

Страница 15: ... DIP Switches There is a 4 bit DIP switch on the board When the switch is turned to the on position a logic 1 will be seen The connections are in Table 18 Table 18 DIP Switches SW0514 Connection LEDs Eight LEDs can be used for custom status signaling They are low active with a logic 0 the LED is on You can control the LEDs via the signals below Table 19 LED LD0501 LD0508 Connection Pin Signal Name...

Страница 16: ...ix You do not need the polling method if only four keys are used Connect the column driver signals of one column to VCC the other two to GND and query the row data signals CPU Reset Key The CPU reset key is a global reset Please refer to the Reset Chip section of this document for detailed informa tion Single Step Key The single step key is connected to a normal input of the FPGA and can be used b...

Страница 17: ...Figure 8 illustrates the position of major components Figure 8 Components Ethernet PHY Asynchronous SRAM SPI Flash MachXO Audio Codec USB Controller USB Controller for the Configuration 8 x 6 Prototyping Area of the MachXO Parallel Flash 12 x 12 Prototyping Area of the FPGA FPGA LFEC33 ...

Страница 18: ...GA Connections for the 12x12 Prototyping Area FPGA Pin Signal Name LRF Pin FPGA Pin Signal Name LRF Pin AB13 BB3V3 IO0 TP0901 AB12 BB3V3 IO1 TP0902 AA12 BB3V3 IO2 TP0903 Y12 BB3V3 IO3 TP0904 W12 BB3V3 IO4 TP0905 V12 BB3V3 IO5 TP0906 V11 BB3V3 IO6 TP0907 U10 BB3V3 IO7 TP0908 T10 BB3V3 IO8 TP0909 U9 BB3V3 IO9 TP0910 T9 BB3V3 IO10 TP0911 U8 BB3V3 IO11 TP0912 AB10 BB3V3 CLK0 TP0918 AB11 BB3V3 CLK0 TP0...

Страница 19: ...O2 BB3V3_IO1 BB3V3_IO0 BB3V3_IO4 BB3V3_IO5 BB3V3_IO6 BB3V3_IO7 BB3V3_IO8 BB3V3_IO9 BB3V3_IO10 BB3V3_IO11 BB2V5_IO0 BB2V5_IO 9 0 BB2V5_IO1 BB2V5_IO2 BB2V5_IO3 BB2V5_IO4 BB2V5_IO6 BB2V5_IO7 BB2V5_IO8 BB2V5_IO9 BB2V5_IO5 BB2V5_DAT0 BB2V5_DAT0 VCC3V3 GND VCC2V5 TP09104 TP0935 TP0996 TP0912 TP0963 TP09124 TP0954 TP09117 TP0944 TP0908 TP09106 TP0936 TP0921 TP0964 TP0986 TP09125 TP0957 TP09115 TP0946 TP0...

Страница 20: ...ilt in download cable permits the FPGA and SPI PROM to be programmed It is not recommended for the MachXO to be repro grammed However the MachXO does provide some connections to the LatticeECP33 FPGA and to an 8x6 proto typing area For further information please consult the MachXO Family Data Sheet GND TP0343 GND TP0344 GND TP0345 GND TP0346 GND TP0347 GND TP0348 Table 23 MachXO Connections for th...

Страница 21: ...d directly to the FPGA SPI Flash The LatticeECP33 FPGA is an SRAM based programmable device and is therefore volatile In order for it to be automatically configured upon power up a non volatile 8 Mbit SPI Flash device is provided The SPI Flash can be programmed with configuration bitstream data The SPI Flash can be configured either through the ispDOWN LOAD connector or via the integrated USB conf...

Страница 22: ... Loader 12 If desired select Hardware Setup to display general information about the configuration process 13 Click OK to exit the FPGA Loader add the devices and return to the ispVM System software window 14 Click GO The ispVM System software programs the SPI Flash via the FPGA 15 Disconnect and then reconnect the power supply The FPGA will take about three seconds to be programmed by the SPI Fla...

Страница 23: ...e board was shipped you can alternatively unplug the power supply and then plug it in again Table 25 Pin Table Pin Name Signal Name Appliance F21 HS DAT2 High speed LVDS Connector E22 HS DAT2 High speed LVDS Connector F11 BB2V5 IO0 FPGA Prototyping Area F12 BB2V5 IO1 FPGA Prototyping Area F13 BB2V5 IO2 FPGA Prototyping Area G13 BB2V5 IO3 FPGA Prototyping Area F14 BB2V5 IO4 FPGA Prototyping Area G1...

Страница 24: ...o Codec Y2 CODEC LRCOUT Audio Codec Y3 CODEC MCLK Audio Codec V4 CODEC MODE Audio Codec Y1 CODEC SCLK Audio Codec AA2 CODEC SDIN Audio Codec V21 CSSPIN Configuration U7 DAC DIG DAC D16 DDR A0 DDR RAM C16 DDR A1 DDR RAM E16 DDR A10 DDR RAM C13 DDR A11 DDR RAM B13 DDR A12 DDR RAM C17 DDR A13 DDR RAM E15 DDR A2 DDR RAM D15 DDR A3 DDR RAM C15 DDR A4 DDR RAM E14 DDR A5 DDR RAM D14 DDR A6 DDR RAM C14 DD...

Страница 25: ...R RAM A15 DDR DQ2 DDR RAM H20 DDR DQ20 DDR RAM J19 DDR DQ21 DDR RAM J18 DDR DQ22 DDR RAM H17 DDR DQ23 DDR RAM F22 DDR DQ24 DDR RAM G22 DDR DQ25 DDR RAM H22 DDR DQ26 DDR RAM H21 DDR DQ27 DDR RAM K19 DDR DQ28 DDR RAM K18 DDR DQ29 DDR RAM B16 DDR DQ3 DDR RAM L18 DDR DQ30 DDR RAM L19 DDR DQ31 DDR RAM A17 DDR DQ4 DDR RAM B17 DDR DQ5 DDR RAM A18 DDR DQ6 DDR RAM B18 DDR DQ7 DDR RAM B22 DDR DQ8 DDR RAM B2...

Страница 26: ...3 Ethernet J4 ETH RXDV Ethernet J5 ETH RXER Ethernet J1 ETH TXCLK Ethernet H1 ETH TXD0 Ethernet H2 ETH TXD1 Ethernet H3 ETH TXD2 Ethernet H4 ETH TXD3 Ethernet J3 ETH TXEN Ethernet J2 ETH TXER Ethernet U20 EXPCON CLKIN Expansion Connector Y22 EXPCON CLKOUT Expansion Connector K22 EXPCON IO0 Expansion Connector K21 EXPCON IO1 Expansion Connector N22 EXPCON IO10 Expansion Connector N21 EXPCON IO11 Ex...

Страница 27: ...Connector AB21 EXPCON IO35 Expansion Connector T17 EXPCON IO36 Expansion Connector T14 EXPCON IO37 Expansion Connector T13 EXPCON IO38 Expansion Connector U14 EXPCON IO39 Expansion Connector L20 EXPCON IO4 Expansion Connector U13 EXPCON IO40 Expansion Connector U12 EXPCON IO41 Expansion Connector U11 EXPCON IO42 Expansion Connector V14 EXPCON IO43 Expansion Connector V13 EXPCON IO44 Expansion Conn...

Страница 28: ...D B1 MACHXO CLK0 Configuration C1 MACHXO IO0 Configuration E2 MACHXO IO1 Configuration F3 MACHXO IO2 Configuration R6 MACHXO IO3 Configuration U3 MACHXO IO4 Configuration V3 MACHXO IO5 Configuration V2 MACHXO IO6 Configuration V1 CLK FPGA Clock AB20 MEMORY A0 FLASH SRAM AA20 MEMORY A1 FLASH SRAM AA17 MEMORY A10 FLASH SRAM Y17 MEMORY A11 FLASH SRAM W17 MEMORY A12 FLASH SRAM V17 MEMORY A13 FLASH SRA...

Страница 29: ...H SRAM AA9 MEMORY DQ18 FLASH SRAM Y9 MEMORY DQ19 FLASH SRAM V15 MEMORY DQ2 FLASH SRAM W9 MEMORY DQ20 FLASH SRAM V9 MEMORY DQ21 FLASH SRAM AB8 MEMORY DQ22 FLASH SRAM AA8 MEMORY DQ23 FLASH SRAM Y8 MEMORY DQ24 FLASH SRAM W8 MEMORY DQ25 FLASH SRAM V8 MEMORY DQ26 FLASH SRAM AB7 MEMORY DQ27 FLASH SRAM AA7 MEMORY DQ28 FLASH SRAM Y7 MEMORY DQ29 FLASH SRAM U15 MEMORY DQ3 FLASH SRAM W7 MEMORY DQ30 FLASH SRA...

Страница 30: ...ion V22 SPIDO Configuration AB4 SRAM BE0 FLASH SRAM AA4 SRAM BE1 FLASH SRAM AB3 SRAM BE2 FLASH SRAM AA3 SRAM BE3 FLASH SRAM Y4 SRAM CE FLASH SRAM U4 TST COL0 Key Matrix U6 TST COL1 Key Matrix V5 TST COL2 Key Matrix T1 TST ROW0 Key Matrix T2 TST ROW1 Key Matrix T3 TST ROW2 Key Matrix R1 TST ROW3 Key Matrix V6 TST STEP Key Matrix E6 USB CTS USB B7 USB GPIO0 USB C7 USB GPIO1 USB F8 USB GPIO10 USB A9 ...

Страница 31: ...B B8 USB GPIO6 USB C8 USB GPIO7 USB D8 USB GPIO8 USB E8 USB GPIO9 USB C4 USB MISO USB D3 USB MOSI USB E1 USB OC0 USB D1 USB OC1 USB D2 USB OC2 USB B2 USB PWEN0 USB C2 USB PWEN1 USB C3 USB PWEN2 USB D6 USB RTS USB D5 USB RXD USB C6 USB SCK USB C5 USB SSI USB D4 USB TXD USB A5 VGA BL0 VGA B6 VGA BL1 VGA A4 VGA GR0 VGA B5 VGA GR1 VGA A7 VGA HSYNC VGA A3 VGA RD0 VGA B4 VGA RD1 VGA A6 VGA VSYNC VGA Tab...

Страница 32: ...RDQS40 ExpCon_IO 4 ExpCon_IO 3 ExpCon_IO 2 L M RS_CTS0_ TTL RS_RXD0_ TTL SEG _A SEG _B SEG _C VCC 1 2V VCC 3 3V VCC 3 3V GND GND GND GND GND GND VCC 3 3V VCC 3 3V VCC 1 2V ExpCon_IO 9 ExpCon_IO 8 ExpCon_IO 7 ExpCon_IO 6 ExpCon_IO 5 M N SEG _D SEG _E SEG _F SEG _G SEG _DP VCC 1 2V VCC 1 2V VCC 3 3V GND GND GND GND GND GND VCC 3 3V VCC 1 2V VCC 1 2V ExpCon_IO 14 ExpCon_IO 13 ExpCon_IO 12 ExpCon_IO 1...

Страница 33: ...nformation herein are subject to change without notice Portions copyright 2005 2006 Gleichmann and Company Electronics GmbH Description Ordering Part Number China RoHS Environment Friendly Use Period EFUP LatticeMico32 DSP Development Board LFECP33E D EV ispLEVER Base with LatticeMico32 DSP Development Kit LS ECP33 BASE PC N Date Version Change Summary July 2006 01 0 Initial release March 2007 01 ...

Страница 34: ...LASH_RESET 4 HPE_RESET 3 6 EXPCON_IO 45 0 3 9 USB_MISO 7 USB_SSI 7 USB_SCK 7 USB_MOSI 7 USB_TXD 7 DDR_CKE0 4 DDR_BA0 4 DDR_BA1 4 DDR_VREF 4 DDR_WE 4 DDR_RAS 4 DDR_CAS 4 DDR_S0 4 DDR_S1 4 DDR_DQ 31 0 4 DDR_A 13 0 4 DDR_CK0 4 DDR_CK0 4 DDR_DQS 3 0 4 DDR_DM 3 0 4 DDR_CK1 4 CODEC_MODE 10 USB_RXD 7 USB_RTS 7 USB_CTS 7 MACHXO_IO 6 0 3 MACHXO_CLK0 3 DDR_CKE1 4 DDR_CK1 4 HSCON_DAT1 9 HSCON_DAT1 9 HSCON_DA...

Страница 35: ...02 0R00 1 2 TP0342 TP0346 100n C0314 12p0 C0340 RJ0303 nb_10K0 1 2 TP0320 1n00 C0301 RJ0305 nb_10K0 1 2 LD0301 LED blue 100n C0316 100n C0319 TP0304 X2 USB Peripheral VCC 1 DATA 2 DATA 3 GND 4 SHIELD 5 SHIELD 6 100n C0312 R0307 4k70 1 2 TP0326 R0317 10K0 1 2 SW0302 CAS 120A A 1 B 3 C 2 TP0311 Q0301 24MHz 1 2 TP0359 T0302 BSS138 SOT FB0301 BLM18BD601SN1 1 2 TP0344 TP0353 TP0350 RJ0301 nb_10K0 1 2 1...

Страница 36: ...C3V3 GND GND GND VCC3V3 VCC3V3 GND GND VCC3V3 VCC3V3 MEMORY_A 22 0 2 MEMORY_DQ 31 0 2 FLASH_RESET 2 FLASH_RY BY _A 2 FLASH_RY BY _B 2 SRAM_BE0 2 SRAM_BE1 2 SRAM_BE2 2 SRAM_BE3 2 SRAM_CE 2 MEMORY_OE 2 MEMORY_WE 2 FLASH_CE 2 FLASH_WP ACC 2 FLASH_BYTE 2 DDR_DQ 31 0 2 DDR_A 13 0 2 DDR_CK0 2 DDR_CK0 2 DDR_DQS 3 0 2 DDR_DM 3 0 2 DDR_CK1 2 DDR_CK1 2 DDR_CKE0 2 DDR_CKE1 2 DDR_BA0 2 DDR_BA1 2 DDR_WE 2 DDR_...

Страница 37: ...e Display Contrast TP0507 nb_TEST POINT 1 R0523 1K00 1 2 SW0514 SW DIP 4 LD0502 LED red R0507 330R 1 2 R0510 100K TP0508 nb_TEST POINT 1 SW0502 B3FS 1010P 1 3 2 4 LD0507 LED red R0501 330R 1 2 D0506 MMBD4148 SW0504 B3FS 1010P 1 3 2 4 D0508 MMBD4148 D0510 MMBD4148 D0512 MMBD4148 R0522 120R 1 2 TP0509 nb_TEST POINT 1 RP0502 10K0 1 8 2 7 3 6 4 5 D0501 MMBD4148 SW0508 B3FS 1010P 1 3 2 4 R0502 330R 1 2...

Страница 38: ...t c e j o r P Authors Revision Created Last modified IFW o f Page t e s e R _ k c o l C _ 6 0 12 6 Ext Reset Reset Button Reset Control Clock Sources 1 25 V Rp of the I2C bus Rs of the I2C bus CLK Offpage Vth 1 25V x R0601 R0602 R0602 4 4V R0614 33R0 SW0601 B3FS 1010P 1 3 2 4 FB0601 BLM21PG331SN1D 1 2 R0611 22R0 100n C0601 TP0601 TEST POINT 1 U0601 CAT1026SI 30 VLOW 1 RESET 2 VSENSE 3 GND 4 SDA 5 ...

Страница 39: ...Hz USB OTG USB HOST USB HOST USB HOST C0707 1u00 100n C0701 EXT MEMORY EXT MEMORY CONTROL GPIO USB PORTS CHARGE PUMP RESET CLOCK POWER U0702 CY7C67300_TQFP100 A1 1 A2 2 A4 7 A3 3 A6 17 A5 8 A8 24 A9 25 A7 20 A10 27 A11 30 A12 31 A13 32 A14 33 A15 CLKSEL 38 A16 97 A17 95 A18 96 D0 83 A0 BEL 99 D1 82 D2 81 D3 80 D4 79 D5 78 D6 77 D7 76 D8 MISO 74 D9 SSI 73 D10 SCK 72 D11 MOSI 71 D12 TXD 70 D13 RXD 6...

Страница 40: ...0810 49R9 1 2 C0806 1n00 1 2 R0808 49R9 1 2 R0816 22K1 1 2 R0801 220R 1 2 R0813 220R 1 2 R0802 22R0 1 2 C0801 270p 1 2 C0802 270p 1 2 R0805 nb_10K0 1 2 R0818 10K0 1 2 R0804 nb_10K0 1 2 C0810 220n 1 2 LED0801 LED red 1 2 RJ0805 nb_10K0 1 2 C0805 10n0 1 2 RJ0803 nb_10K0 1 2 R0809 49R9 1 2 C0809 220n 1 2 U0802 PULSE H1112 RD 5 RD 6 CT_RD 4 TD 1 TD 2 CT_TD 3 RX 8 RX 7 CT_RX 9 TX 12 TX 11 CT_TX 10 R080...

Страница 41: ..._IO 45 0 2 3 BB3V3_CLK0 2 BB3V3_CLK0 2 BB2V5_IO 7 0 2 HSCON_DAT4 2 HSCON_DAT4 2 HSCON_DAT1 2 HSCON_DAT1 2 HSCON_DAT2 2 HSCON_DAT2 2 HSCON_DAT0 2 HSCON_DAT0 2 HSCON_DAT3 2 HSCON_DAT3 2 t e e h S t c e j o r P Authors Revision Created Last modified IFW o f Page C p x E _ 9 0 on_ProtoArea 12 9 Offpage Expansion Connector Prototyping Area RM2 54 of FPGA Pin 2 removed for coding of expansion board LVDS...

Страница 42: ...2 VGA_HSYNC 2 VGA_BL1 2 VGA_VSYNC 2 CODEC_MODE 2 t e e h S t c e j o r P Authors Revision Created Last modified IFW o f Page 10_Audio_VGA 12 10 Audio Codec MICIN LINEIN LINEOUT VGA Interface Offpage Interface Mode 0 1 2 wire SPI 10u0 C1011 47p0 C1005 470n C1004 R1007 4k70 1 2 R1005 4k70 1 2 R1018 270R R1002 100R 1 2 R1012 270R R1009 10K0 1 2 470n C1003 R1013 270R RJ1002 nb_10K0 1 2 1u00 C1012 47p0...

Страница 43: ...02 TEST POINT 1 L1103 10u0 R1111 0R05 1 2 D1103 10MQ040N 1 2 LD1102 LED green 10u0 C1101 SI6966DQ T1101A 4 1 2 3 220p C1118 optional Pad1102 ArtNr05281 LD1101 LED green D1104 MBR0540LT1 1 2 nb_10n0 C1125 R1114 330R 1 2 C1130 220u optional Pad1101 ArtNr05281 optional Pad1105 ArtNr05281 R1107 15K0 1 2 4p70 C1132 D1101 MBR0540LT1 1 2 SI6966DQ T1102A 4 1 2 3 R1108 15K0 1 2 100n C1124 SI6966DQ T1101B 5...

Страница 44: ...iceMico32 DSP Development Board Lattice Semiconductor User sGuide Appendix B Assembly Diagram Note Figures 23 26 provide an enlargement of each numbered section in Figure 22 Figure 22 Assembly Diagram 1 2 3 4 ...

Страница 45: ...45 LatticeMico32 DSP Development Board Lattice Semiconductor User sGuide Figure 23 Assembly Diagram Section 1 Detail ...

Страница 46: ...46 LatticeMico32 DSP Development Board Lattice Semiconductor User sGuide Figure 24 Assembly Diagram Section 2 Detail ...

Страница 47: ...47 LatticeMico32 DSP Development Board Lattice Semiconductor User sGuide Figure 25 Assembly Diagram Section 3 Detail ...

Страница 48: ...48 LatticeMico32 DSP Development Board Lattice Semiconductor User sGuide Figure 26 Assembly Diagram Section 4 Detail ...

Страница 49: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Lattice LS ECP33 BASE PC N ...

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