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LatticeECP2M SERDES
Lattice Semiconductor
Evaluation Board User’s Guide
Figure 3. LatticeECP2M SERDES Evaluation Board, Top View
LatticeECP2M Device
This board features a LatticeECP2M FPGA with a 1.2V core supply. It can accommodate all pin compatible
LatticeECP2M devices in the 672-ball fpBGA (1mm pitch) package. A complete description of this device can be
found in the
LatticeECP2/M Family Data Sheet
.
Note: The connections referenced in this document refer to the LFE2M35E-FF672 device. Available I/Os and asso-
ciated sysIO™ banks may differ for other densities within this device family. However, only the LFE2M50E-FF672
device allows full use of the PCI Express x1 edge, SFP and SATA interfaces.
Applying Power to the Board
The LatticeECP2M SERDES Evaluation Board is ready to power on. The board can be supplied with power from
an AC wall-type transformer power supply shipped with the board. Or it can be supplied from a bench-top supply
via terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers from a host
board.
To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cord
to J1 and plug the wall transformer into an AC wall outlet.
Power Supplies
(see Appendix A, Figure 2)
The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped to
accept a main supply via the TB1 connection. This connection is provided to use with a bench-top supply adjusted
to provide a nominal 12V DC.
All input power sources and on-board power supplies use surface mounted fuses and have green LEDs to indicate
power GOOD status of the intermediate supplies
