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A-1
A. BOARD SPECIFICATIONS
FEATURES
DESCRIPTION
Overview
CompactPCI System Processor board
Supported
Microprocessors
Pentium III Processor – Low Power 500MHz
CHIPSET
Intel 440BX AGPset.
22-signal High-Availability controller: #Select, #Healthy, #Reset for 7
CPCI I/O slots #Enum, (43 with mezzanine)
Bus Interface
100MHz Front side bus
CompactPCI bus,64 bits (33MHz) through J1 and J2
PCI-PCI bridge: DEC 21154; supports up to 7 REQ/GNT for fully loaded
CompactPCI® system
PCI Mezzanine (PMC)
Proprietary Mezzanine with PCI bus, FD and EIDE support
SMBus (for power management of CPU temperature monitoring, DRAM
control, clock buffers and power control)
Cache Memory
cPCI-MXS64 : Level 1: 16/16KB instruction/Data CPU-internal Level 1
Level 2: 256KB internal, 64-bit wide, pipelined burst
System Memory
Three 168-pin Latching DIMM sockets, 64/72-bit
Up to 768Mb of SDRAM with parity or ECC
(for single bit error correction and double bit error detection)
Data Path
64-bit on CPU, 32-bit on video memory; 32-bit on local PCI and 64-bits
on CompactPCI connectors
Interrupts
11 edge sensitive and configurable
4 PCI level sensitive, configurable to any interrupt vector for PnP
compatibility.
Flash Memory
512KB for BIOS field upgrade; Silicon Serial ID TAG for unique board
identification accessible via software.
Video
32-bit AGP video controller (Intel 69000) with 2MB video memory
CRT resolutions up to 1024 x 768 x 64K colors or 1280 x 1024 x 256
colors
Clock/Calendar
Real-time clock with (replaceable) battery backup, CMOS RAM
Содержание cPCI-MXS64
Страница 5: ...ADDITIONAL COMMENTS...
Страница 68: ...cPCI MXS64 Technical Reference Manual 3 26 The cTM80 STD Transition Module 8HP configuration 1 Rev...
Страница 105: ...D 1 D BOARD DIAGRAMS D 1 TOP DEVICES SURFACE MOUNT...
Страница 106: ...cPCI MXS64 Technical Reference Manual D 2 D 2 ASSEMBLY BOTTOM DIAGRAM...
Страница 107: ...Board Diagrams D 3 D 3 MOUNTING HOLES...