CP307
Functional Description
ID 34424, Rev. 3.0
Page 2 - 17
P R E L I M I N A R Y
2.3.6
CompactPCI Bus Interface
The complete CompactPCI connector configuration
comprises two connectors named J1 and J2.
Their function is as follows:
• J1: 32-bit CompactPCI interface with PCI bus
signals, arbitration, clock and power
• J2: arbitration, clock and optionally either Rear I/O
interface functionality or 64-bit termination
The board is capable of driving up to seven CompactPCI
slots, with individual arbitration and clock signals. The
CP307 is not hot-swappable but supports the addition or
removal of other boards whilst in a powered-up state.
The CP307 is designed for a CompactPCI bus
architecture. The CompactPCI standard is electrically
identical to the PCI local bus. However, these systems are
enhanced to operate in rugged industrial environments
and to support multiple slots.
2.3.6.1
CompactPCI Connector Keying
CompactPCI connectors support guide lugs to ensure a
correct polarized mating. A proper mating is further
assured by the use of color coded keys for 3.3 V and 5 V
operation.
Color coded keys prevent inadvertent installation of a 5 V
board into a 3.3 V slot and vice versa. The CP307 board
may be ordered as either a 3.3 V or a 5 V version.
Backplane connectors are always keyed according to the
signaling (VIO) level. Coding key colors are defined as
follows:
Table 2-13: Coding Key Colors
SIGNALING VOLTAGE
KEY COLOR
3.3 V
Cadmium Yellow
5 V
Brilliant Blue
J2
ED C B A
1
22
1
J1
25
F Z
Note:
Pinrow F: GND
Pinrow Z: NC
Figure 2-6: CPCI Connectors
J1/J2
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