10 MHz REF
W59
W63
W60
W62
REAR PANEL
INTERCONNECTS
A19 TEST SET MOTHERBOARD
HANDLER O
I/
HANDLER O
INTERFACE
I/
TEST SET /O
PWR O
I/
TEST SET I/O
INTERFACE
PWR I/O
INTERFACE
MEAS TRIG IN
LOCAL
DIGITAL BUS
TO
A34 THRU A37,
A42 THRU A49
MEAS TRIG RDY
MEAS TRIG IN
AUX TRIG 2 OUT
AUX TRIG 2 IN
AUX TRIG 1 OUT
AUX TRIG 1 IN
28 V
28 V
AUX TRIG 2 OUT
AUX TRIG 2 IN
AUX TRIG 1 OUT
AUX TRIG 1 IN
MEAS TRIG RDY
POWER
BUS
\
9
\
25
\
36
LO OUT (J5)
W47
BIAS 4 IN
9 MHz
15 MHz
15 MHz
9 MHz
9 MHz
15 MHz
9 MHz
15 MHz
9 MHz
15 MHz
ADC
ADC
ADC
PCI
BRIDGE
A12 SIGNAL PROCESSING
ADC MODULE (SPAM)
J1
A
B
J3
J2
RAM
DSP
X6
D
DITHER
NOISE
ADC
FRONT PANEL
INTERCONNECTS
CONTROLLER
GPIB
TALKER/LISTENER
GPIB
VGA
LAN
LOCAL DIGITAL BUS
POWER BUS
MAIN
CPU
EEPROM
ROM
RAM
VIDEO RAM
A51
HARD DISK
DRIVE
A18
GPIB
A1 FRONT PANEL INTERFACE BOARD
PCI BUS
A14
SYSTEM
MOTHERBOARD
A15 MIDPLANE
A3
DISPLAY
A2
USB BD
A16
POWER
SUPPLY
DISPLAY
PROCESSOR
INVERTER
POWER
USB
HUB
KEYPAD
AC LINE IN
VIDEO PROCESSOR
RAM
FLASH
A17 CPU
SPEAKER
USB
INTERFACE
GPIB PORT
INTERFACE
GPIB PORT
INTERFACE
VGA
INTERFACE
10/100 BASE-T
ETHERNET
USB x 4
USB x 4
N5264A Overall Block Diagram
(Includes Options 700 - Standard; 108 - LO Source
Service Guide: N5264-90001
10 MHz
REF IN
W69
10 MHz
REF OUT
W68
BIAS 2 IN
BIAS 3 IN
BIAS 1 IN
J541
J542
J543
J544
J4
J5
J6
R
C/R1
D/R2
50 OHM
LOAD
12.5 MHz
to
13.518 GHz
EXT TEST SET DRIVE LO OUT
1
2
LOCAL
DIGITAL BUS
POWER
BUS
TO A10, A11, A21
W41
Bx = ACTIVE SOURCE BAND
SERIAL TEST BUS NODES
MIXED POWER AND CONTROL SIGNALS
FROM THE
A19 TEST SET MOTHERBD
LOCAL DIGITAL BUS
POWER BUS
HIGH DENSITY DATA BUS
21 August 2008
N5264A_blk
R1
R2
R3
R4
A
R
D/R2
C/R1
B
IF INPUTS
PULSE I/O
A20 J20
A20 J202
A20 J602
A20 J802
A20 J402
A20 J2
P1
A20 IF MULTIPLEXER
PULSE
GATES
PULSE
MODULATION LOGIC
(DISABLED)
PulseA
Pulse B
Pulse R
Pulse C
Pulse D
Main IF A
Main IF B
Main IF R
Main IF C
Main IF D
EXT IF IN A
EXT IF IN B
EXT IF IN R
EXT IF IN C
EXT IF IN D
AUX R4
AUX R3
AUX R2
AUX R1
P1
P201
P601
P801
P411
P412
P413
P414
P3
P203
P603
P803
P403
10.7 MHz
A
B
D/R2
R
IF OUT A
IF OUT B
IF OUT C
IF OUT D
IF OUT R
C/R1
10 MHz REF
10 MHz
50 MHz REF
10 MHz
HIGH STAB
OCXO
100 MHz
A10 FREQUENCY REFERENCE
215
211
10 MHz
200 Hz
DAC
J3
J2
J5
J4
J8
NC
J7
J6
50 MHz
ƒ
10 MHz
W64
W65
A21 LO MULTIPLIER/AMPLIFIER 26.5 (HMA26.5)
B2-28
B2-28
B29
B30-32
B33-36
B29-36
B29-36
FROM
A19
26 GHz
13 GHz
0.013-13.518 GHz
13.518-26.508 GHz
0.013-26.508 GHz
511
13.5-15.4 GHz
15.4 - 20.0 GHz
20.0 - 26.5 GHz
ALC
1.0-2.0 GHz
2.0-3.0 GHz
5.332-6.752 GHz
6.752-8.0 GHz
10.664-13.510 GHz
8.0-10.664 GHz
0.010-13.510 GHz
3.0-4.0 GHz
4.0-5.332 GHz
J1207
B2-36
B2-13
B14-20
B2-23, 29-30
B24-28,
31-36
B21-23,29-30
B21-36
B21-36
-10 to +10 dBm
0.5-1.0 GHz
2
X2
4
A11 13.5 GHz LO SYNTHESIZER
2-4 GHz
B14-15
B2-13
B16-17
B18
B19-20
B23,
29-30
B26-28,34-36
B24-25,31-33
B22,
26-28,
34-36
50 MHz
REF
J5
0.01-0.5 GHz
ƒ
LOCAL
DIGITAL
BUS
POWER
BUS
3.4 GHz
Frac-N
Logic
ƒ
R
I
L
Frac-N
Logic
X2
B21,
24-25,
31-33
10
2
X2
PULSE
GATES
10.7 MHz
PULSE
GATES
10.7 MHz
PULSE
GATES
10.7 MHz
PULSE
GATES
10.7 MHz
MAIN
HET
W61
ADC
NC
NC
NC
NC
NC
NC
OPTION 108
N/C