List of Illustrations
2
Card Installation
Figure 2-1
Multi-pin card installation ...................................................................................................................... 2-3
Figure 2-2
Screw terminal card installation ............................................................................................................ 2-4
3
Getting Started
Figure 3-1
Model 7001 front panel............................................................................................................................ 3-2
Figure 3-2
Model 7001 rear panel ............................................................................................................................. 3-3
Figure 3-3
Channel status display ............................................................................................................................ 3-5
Figure 3-4
Channel assignments (matrix cards) ..................................................................................................... 3-5
Figure 3-5
Channel assignments (non-matrix type cards) .................................................................................... 3-6
Figure 3-6
Simplified model of scan operation..................................................................................................... 3-10
4
Front Panel Operation
Figure 4-1
Display format .......................................................................................................................................... 4-3
Figure 4-2
Channel status display ............................................................................................................................ 4-4
Figure 4-3
Interpreting channel status display ....................................................................................................... 4-4
Figure 4-4
Model 7001 analog backplane ................................................................................................................ 4-7
Figure 4-5
Matrix row connections to backplane ................................................................................................... 4-7
Figure 4-6
Channel assignments (non-matrix type cards) .................................................................................... 4-8
Figure 4-7
Channel assignments (matrix cards) ..................................................................................................... 4-9
Figure 4-8
Trigger Model (Front panel scan operation) ...................................................................................... 4-14
Figure 4-9
Digital I/O port simplified schematic.................................................................................................. 4-43
Figure 4-10
Sample externally powered relay ........................................................................................................ 4-46
Figure 4-11
Digital I/O port ....................................................................................................................................... 4-47
Figure 4-12
Digital I/O connections using trigger link cable ............................................................................... 4-48
Figure 4-13
External triggering connectors (BNC)................................................................................................. 4-48
Figure 4-14
External trigger and asynchronous Trigger Link Input pulse specifications................................ 4-48
Figure 4-15
Channel ready and asynchronous Trigger Link Output pulse specifications .............................. 4-49
Figure 4-16
DUT test system ..................................................................................................................................... 4-50
Figure 4-17
External trigger connectors................................................................................................................... 4-50
Figure 4-18
Trigger link connectors.......................................................................................................................... 4-51
Figure 4-19
DUT test system ..................................................................................................................................... 4-52
Figure 4-20
Trigger Link connections (asynchronous example #1)..................................................................... 4-52
vii
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