NX-MD1R/NX-MD1
1-57
MIIL1644SA-50T (IC390) : DRAM
1. Terminal layout
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
VDD
D0
D1
WE
RAS
A11
A10
A0
A1
A2
A3
VDD
2. Pin function
Pin No.
Symbol
Function
1.13
2.3.24.25
4
5
6.8~12.
15~19.21
8~12.
15~19.21
14.26
22
23
Power supply(3.3V)
Data I/O
Write enable
load adress strobe
Adress input
(4K Refresh Product)
Adress input
(2K Refresh Product)
Ground
Output enable
Colum adress strobe
3. Block diagram
DO D1 D2 D3
Data output
buffer
Data input
buffer
D0~3
D0~3
OE
4
4
WE
CAS
CAS clock
generator
Colum pre
decoder(11/10)
Reflesh
controller
Reflesh
counter
Low pre decoder
(11/12)
RAS clock
generator
X16 parallel
test
Colum decoder
Sense amp
I/O gate
Low
decoder
Memory arry
4,194,304 x 4
Sub straight generator
VDD
VSS
(11/12)
(11/10)
RAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
(A11)
VSS
D3
D2
CAS
OE
A9
A8
A7
A6
A5
A4
VSS
VDD
DO~D3
WE
RAS
AO~A11
AO~A10
VSS
OE
CAS