NX-MD1R/NX-MD1
1-59
PCM2702E (IC431) : D/A converter
1. Terminal layout
2. Block diagram
3. Pin function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
I
-
-
-
-
I/O
I/O
I
-
O
O
O
I
I
I
I
-
-
O
-
-
-
O
-
XTI
V
DD
C
DGNDC
V
DD
DGND
D
D
V
BUS
DGNDU
PLYBCK
SSPND
ZERO
TEST3
TEST2
TEST1
TEST0
V
CC
R
AGNDR
V
OUT
R
AGND
V
COM
V
CC
V
OUT
L
AGNDL
Crystal oscillator input
Digital power supply for clock gen3.3V
Digital ground for clock generator
Digital power supply ,+3.3V
Digital ground
USB differential input/output plus
USB differential input/output minus
USB bus power
Digital ground for USB transceiver
Playback flag (L:playback H:idol)
Suspend flag (L:suspend H:operational)
Zero flag (L:normal H:zero)
Test pin 3. Connect to digital ground
Test pin 2. Connect to digital ground
Test pin 1. Connect to digital ground
Test pin 0. Connect to digital ground
Analog supply forR-channel ,+5v
Analog ground for R-channel
Analog output for R-channel
Analog ground
DC common-mode voltage for DAC
Analog supply ,+5v
Analog output for L-channel
Analog ground for L-channel
Pin
No.
Symbol
I/O
Function
XTI
V
DD
C
DGNDC
V
DD
DGND
D+
D
–
V
BUS
DGNDU
PLYBCK
SSPND
ZERO
TEST3
TEST2
XTC
V
CC
P
AGNDP
V
CC
L
AGNDL
OUTL
V
CC
V
COM
AGND
OUTR
AGNDR
V
CC
R
TEST0
TEST1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC
DAC
SpAct™
8x
Over sampling
Digital Filter
USB
I/F
Low-Pass
Filter
Low-Pass
Filter
Power supply
OSC
FIFO
mclk
System Clock
wrclk
USB
Packet
Data
Audio
Data
OUTL
V
COM
OUTR
rdclk
USB
Clock
Genelator
PLYBCK
V
DD
P
DGNDP
XTI
XTC
V
CC
AGND
V
DD
DGND
D+
D–
V
BUS
V
DD
C
DGNDU
DGNDC
SSPND
ZERO
V
CC
L
AGNDL
V
CC
R
AGNDR
Multi-
Level
Delta-
Sigma
Modulator
25
26
27
28
-
-
-
O
V
CC
L
AGNDP
V
CC
P
XTO
Analog supply for L-channel, +5v
Analog ground for PLL
Analog supply for PLL, +5v
Crystal oscillator output
I
I
I
Audio
Clock
Genelator