71
3
Award BIOS Setup Utility
3.1.3 Advanced Chipset Features
DRAM Timing Selectable
This field is used to select the timing of the DRAM.
By SPD
The EEPROM on a DIMM has SPD (Serial
Presence Detect) data str ucture that stores
information about the module such as the
memor y type, memor y size, memor y speed, etc.
When this option is selected, the system will run
according to the information in the EEPROM.
By User
It allows you to configure the 2 fields that follow
(CAS Latency Time and Active to Precharge
Delay). The system will run according to the
settings in these two fields.
CAS Latency Time
This field is used to select the local memory clock periods.
Active to Precharge Delay
The options are 5, 6 and 7.
The settings on the screen are for reference only. Your version may not be
identical to this one.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
Menu Level
↑↓→←
Move
F6:Fail-Safe Defaults
F7:Optimized Defaults
F1:General Help
Enter:Select
F5:Previous Values
+/-/PU/PD:Value
F10:Save
ESC:Exit
DRAM Timing Selectable
CAS Latency Time
Active to Precharge Delay
DRAM Data Integrity Mode
Memory Frequency For
System BIOS Cacheable
Video BIOS Cacheable
Video RAM Cacheable
Delayed Transaction
AGP Aperture Size (MB)
AGP 4X Mode
By SPD
2.5
7
Non-ECC
Auto
Disabled
Disabled
Disabled
Enabled
64
Enabled
X
X
