REL1.1
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iWave Systems Technologies Pvt. Ltd.
Zynq-Ult MPSoC SOM Development Platform Hardware User Guide
2.4.4
USB2.0 OTG Port
The Zynq Ult MPSoC carrier Board supports USB2.0 High Speed OTG interface through USB0 OTG Controller
of Zynq Ult MPSoC PS. This USB2.0 OTG interface is supported through USB2.0 MicroAB connector (J8). The
USB PHY Transceiver output signals
from Board to Board connector2 is connected to “FUSB340” USB Switch for
selecting the USB2.0 OTG conenction between USB2.0 MicroAB connector (J8) and USB3.0 TypeC connector (J20). The
selection can be done by setting the Single bit DIP switch (SW4). If the DIP switch (SW4) is set to ON, USB2.0 OTG is
connected to MicroAB connector (J8) and if the DIP switch (SW4) is set to OFF, USB2.0 OTG is connected to USB3.0
TypeC connector (J20).
The USB2.0 OTG port can be used as full functional OTG functionality which supports USB2.0 host and USB2.0 device
based on USB ID pin status. The VBUS power of this USB2.0 MicroAB connector is connected through current limit
power switch which can be used to switch On/Off the power based on the device or Host and also limits the current
above 900mA in host mode. The USB PHY transceiver in SOM detects the USB functionality through USB ID pin (34
th
pin of B2B-2) and controls the power using the USB_PWR_EN pin (32
nd
pin of B2B-2). This USB2.0 OTG connector (J13)
is physically located at the top of the board as shown below.
Figure 12: USB OTG Connector