REL1.1
Page 22 of 89
iWave Systems Technologies Pvt. Ltd.
Zynq-Ult MPSoC SOM Development Platform Hardware User Guide
Table 5: Display Port Connector Pin Assignment
Pin No
Pin Name
Signal Name
Signal Type/
Termination
Description
1
DP_L0+
PS_MGTRTXP1_505
O, DIFF
Display Port Lane0 Transmit pair
positive.
2
GND
GND
Power
Ground.
3
DP_L0-
PS_MGTRTXN1_505
O, DIFF
Display Port Lane0 Transmit pair
negative.
4
DP_L1+
PS_MGTRTXP0_505
O, DIFF
Display Port Lane1 Transmit pair
positive.
5
GND
GND
Power
Ground.
6
DP_L1-
PS_MGTRTXN0_505
O, DIFF
Display Port Lane1 Transmit pair
negative.
7
DP_L2+
NA
NA
NC.
8
GND
GND
Power
Ground.
9
DP_L2-
NA
NA
NC.
10
DP_L3+
NA
NA
NC.
11
GND
GND
Power
Ground.
12
DP_L3-
NA
NA
NC.
13
CONFIG1
NA
1M PD
Configuration Pin.
14
CONFIG2
NA
1M PD
Configuration Pin.
15
PL_Y10_LVDS66_L6P
IO, DIFF/
100K PD
Auxiliary channel positive.
16
GND
GND
Power
Ground.
17
AUX_CH-
PL_AA10_LVDS66_L6N
IO, DIFF/
100K PU
Auxiliary channel negative.
18
HOT_PLUG
PL_C12_LVDS46_L9N
O,3.3V CMOS/
100K PD
Hot Plug Detect.
19
RETURN
NA
NA
NC.
20
DP_PWR
DP_PWR
O, 3.3V Power
3.3V Supply Voltage.