Error Reporting and Handling
S875WP1-E TPS
Revision 4.0
94
8.3 Bus
Initialization
Checkpoints
The system BIOS gives control to the different buses at several checkpoints to do various tasks.
Table 72 describes the bus initialization checkpoints.
Table 72. Bus Initialization Checkpoints
Checkpoint
Description
2A
Different buses init (system, static, and output devices) to start if present.
38
Different buses init (input, IPL, and general devices) to start if present.
39
Display different buses initialization error messages.
95
Init of different buses optional ROMs from C800 to start.
While control is inside the different bus routines, additional checkpoints are output to port 80h
as WORD to identify the routines under execution. In these WORD checkpoints, the low byte of
the checkpoint is the system BIOS checkpoint from which the control is passed to the different
bus routines. The high byte of the checkpoint is the indication of which routine is being executed
in the different buses. Table 73 describes the upper nibble of the high byte and indicates the
function that is being executed.
Table 73. Upper Nibble High Byte Functions
Value
Description
0
func#0, disable all devices on the bus concerned.
1
func#1, static devices init on the bus concerned.
2
func#2, output device init on the bus concerned.
3
func#3, input device init on the bus concerned.
4
func#4, IPL device init on the bus concerned.
5
func#5, general device init on the bus concerned.
6
func#6, error reporting for the bus concerned.
7
func#7, add-on ROM init for all buses.
Table 74 describes the lower nibble of the high byte and indicates the bus on which the routines
are being executed.
Table 74. Lower Nibble High Byte Functions
Value
Description
0
Generic DIM (Device Initialization Manager)
1 On-board
System
devices
2
ISA devices
3 EISA
devices
4
ISA PnP devices
5 PCI
devices