Errata
Specification Update
37
internal boundary conditions exist that may prevent the data breakpoint from being
captured.
Implication:
When this erratum occurs, a data breakpoint will not be captured.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
20.
MCA Error Code Field in IA32_MC0_STATUS Register May become out
of Sync with the Rest of the Register
Problem:
The MCA Error Code field of the IA32_MC0_STATUS register gets written by a
different mechanism than the rest of the register. For uncorrectable errors, the other
fields in the IA32_MC0_STATUS register are only updated by the first error. Any
subsequent errors cause the Overflow Error bit to be asserted until this register is
cleared. Because of this erratum, any further errors that are detected will update the
MCA Error Code field without updating the rest of the register, thereby leaving the
IA32_MC0_STATUS register with stale information.
Implication:
When this erratum occurs, the IA32_MC0_STATUS register contains stale
information.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
21.
Processor May Hang on a Correctable Error and Snoop Combination
Problem:
The processor will hang whenever a Read-For-Ownership (RFO) or Locked-Read-For-
Ownership (LRFO) hits a line in the L2 cache and also receives a correctable error. A
boundary condition in the error correction logic prevents the processor from issuing
further transactions on the system bus and the processor will hang.
Implication:
When this erratum occurs, the processor may hang.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
22.
The IA32_MC1_STATUS Register May Contain Incorrect Information
for Correctable Errors
Problem:
When a speculative load operation hits the L2 cache and receives a correctable error,
the IA32_MC1_STATUS register may be updated with incorrect information. The
IA32_MC1_STATUS register should not be updated for speculative loads.
Implication:
When this erratum occurs, the IA32_MC1_STATUS register will contain incorrect
information for correctable errors.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.