Integra DTR-7.6 Series, Руководство по обслуживанию

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DTR-7.6
IC BLOCK DIAGRAMS AND DESCRIPTIONS
VQ REFGND
FILT+
AINL
Voltage Reference
AINR
S/H
S/H
DAC
LP Filter
LP Filter
DAC
Q
Q
V
L
1.8V-5.0V SCLK LRCK SDOUT MCLK
Serial Output Interface
RST
M0
M1
High
Pass
Filter
High
Pass
Filter
Digital
Decimation
Filter
Digital
Decimation
Filter
VD
3.3V-5.0V
GND
VA
3.3V-5.0V
+
+
-
-
CS5340-CZZ(101dB,192kHz, Multi-Bit Audio A/D Converter)
Pin Pin Name I/O Description
1 M0 I
16 M1 I
2 MCLK I Master Clock-Clock source for the delta-sigma modulator and digital filters.
3 VL Logic Power-Positive power supply for digital input/output.
4 SDOUT O Serial Audio Data Output-Output for two's complement serial audio data.
5,14 GND Ground-Connect to the analog ground.
6 VD I Digital Power-Positive power supply for the digital section.
7 SCLK I/O Serial Clock-Serial clock for the serial audio interface.
Left Right Clock-Determines which channel, Left and Right, is currently
active on the serial audio data line.
9 RST I Reset-The device enters a low power mode when low.
10 AINL I
Analog Input-The full scale analog input level is 0.56Vp-p.
12 AINR I
Quiescent Voltage-Filter connection for the internal quiescent
reference voltage.
13 VA Analog Power-Positive power supply for the analog section.
Positive Voltage Reference-Positive reference voltage for the internal
sampling circuits.
15 FILT+ O
Mode Selection-Determines the operational mode of the device.
8 LRCK I/O
11 VQ O