Integra DTR-7.6 Series, Руководство по обслуживанию

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DTR-7.6
IC BLOCK DIAGRAM AND DESCRIPTION
FL TUBE(HNA-16SM10T)
M66005 (FL tube driver)
BLOCK DIAGRAM
M66005 TERMINAL DESCRIPTION
These pins are used to connect to digit pins of VFD.
RESET Reset input This pin is used to initialize the internal state of the M66005.
CS Chip select input
"L" : Communication with the MCU is possible.
"H" : Any instruction from the MCU is neglected.
SCK Shift clock input At the rising edge from "L" to "H", input data is shifted.
SDATA Serial data input Character code or command data to display is input from MSB.
XIN,
XOUT Clock input
Clock output This pin is used to connect a resister and a capacitor externally to
set oscillation frequency.
DIG00 ~
DIG15 Digit output
SEG00 ~
SEG39 Segment output
P0, P1 Output port (static operation)
VSS GND
VP Negative power supply for VFD drive.
VCC1
VCC2
Positive power supply for internal logic.
Positive power supply for high-pressure-resistant output port.
SYMBOL PIN NAME DESCRIPTION PIN NO.
13
14
15
16
21,
20
1~12
61~64
23~31
33~59
17, 18
19
60
22
32
These pins are used to connect to segment pins of VFD.
14
15
16
CGROM
(35bit x 160)
CGRAM
(35bit x 16)
code
write
data
dot data
write
code
select
12
1
DIG00
DIG11
scan pulse
CS
SCK
SDATA
21
20
XIN
XOUT
13
RESET
18
17
2
P0
P1
19
60
22
32
Vcc1
Vcc2
Vss
Vp
Code/
command
control
circuit
Bank 1 : 8bit x 16
Bank 2 : 8bit x 64
Segment
output
circuit
Segment/
Digit
select/
output
circuit
Clock
generator
timing
clock
Display
controller
Serial
receive
circuit
Display code RAM
Digit
output
circuit
59
33
31
23
64
63
62
61
DIG12/SEG36
DIG13/SEG37
DIG14/SEG38
DIG15/SEG39
SEG00
SEG26
SEG27
SEG35
24 SEG34
P1 P2 P3 P4 P5
P6 P7 P8 P9 P10
P11 P12 P13 P14 P15
P16 P17 P18 P19 P20
P26 P27 P28 P29 P30
P21 P22 P23 P24 P25
P31 P32 P33 P34 P35
P4 P11 P7 P8 P32 P9 P33 P10 P14 P15 P16 P31 P22 P23 P22 P25 P27
P34
P3 P6 P13 P17 P18 P19 P20 P24 P26
P29
15G 14G 13G 12G 11G 10G 9G 8G 7G 6G 5G 4G 3G 2G 1G
16G
1G~15G