Integra DTR-7.6 Series, Руководство по обслуживанию

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DTR-7.6
IC BLOCK DIAGRAMS AND DESCRIPTIONS
1
2
3
4
8
7
6
5
Vcc
WP
SCL
SDA
A0
A1
A2
GND
2k Bit EEPROM Array
8bit
8bit
8bit
Address
Decorder Slave word
address register
Data
register
Control circuit
START STOP
ACK
High-voltage
generation circuit Power voltage
detection
BR24L02FV-W/08FV-W(256X8 bit EEPROM)
Terminal
Vcc
GND
A0,A1,A2
SCL
SDA
WP
I/O
-
-
I
I
I/O
I
Function
Apply a power source.
Ground termional
Slave address setting terminal
Serial clock input
Slave and word address.
Serial data input and output
Write protect terminal