Integra DTR-7.6 Series, Руководство по обслуживанию

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DTR-7.6
IC BLOCK DIAGRAMS AND DESCRIPTIONS
SiI9031(HDMI PanelLink Cinema Receiver)
Pin # Pin Name I/O Description Use
1 DE O Data Enable Digital Video
2 HSYNC O Horizontal Snyc Output Control signal Digital Video
3 VSYNC O Vertical Snyc Output Control signal Digital Video
4 IOGND Input/Output Pin GND Ground
5 IOVCC Input/Output Pin VCC (3.3V) Power
6 DACOVCC DAC Output VCC (3.3V) Power
7 DACAVCC DAC Analog VCC (3.3V) Power
8 DACAGND DAC Analog GND Ground
9 VREF Configuration/Programming
10 RSET Connects Full Scale Adjust Resistor. Analog Video
12 DACGNDR DAC Red GND Ground
13 DACVCCR DAC Red VCC (3.3V) Power
14 AnRPr O Analog Video Red, Pr Output. Analog Video
15 DACGNDG DAC Green GND Ground
16 DACVCCG DAC Green VCC (3.3V) Power
17 AnGY O Analog Video Green, Y Output. Analog Video
18 DACGNDB DAC Blue GND Ground
19 DACVCCB DAC Blue VCC (3.3V) Power
20 AnBPb O Analog Video Blue, Pb Output. Analog Video
21 DACDGND DAC Digital GND Ground
22 DACDVCC18 DAC Digital VCC (1.8V) Power
23 CVCC18 Digital Logic VCC (1.8V) Power
24 CGND Digital Logic GND Ground
25 IOGND Input/Output Pin GND Ground
26 IOVCC Input/Output Pin VCC (3.3V) Power
27 CSDA I/O Configuration I2C Data Configuration/Programming
28 CSCL I Configuration I2C Clock Configuration/Programming
29 DSDA1 I/O DDC I2C Data for Port 1 Configuration/Programming
30 DSCL1 I DDC I2C Clock for Port 1 Configuration/Programming
31 DSDA0 I/O DDC I2C Data for Port 0 Configuration/Programming
32 DSCL0 I DDC I2C Clock for Port 0 Configuration/Programming
33 R1PWR5V I Port 1 Transmitter Detect Configuration/Programming
34 R0PWR5V I Port 0 Transmitter Detect Configuration/Programming
35 DVCC18 ACR PLL VCC (1.8V) Power
36 DGND ACR PLL GND Ground
37 PVCC0 TMDS Port 0 PLL VCC (3.3V) Power
38 AVCC TMDS Analog VCC (3.3V) Power
39 R0XC- I TMDS Input Clock for HDMI Port 0. Diffrential Signal
40 R0XC+ I TMDS Input Clock for HDMI Port 0. Diffrential Signal
41 AGND TMDS Analog GND Ground
42 AVCC TMDS Analog VCC (3.3V) Power
43 R0X0- I TMDS Input data for HDMI Port 0. Diffrential Signal
44 R0X0+ I TMDS Input data for HDMI Port 0. Diffrential Signal
45 AGND TMDS Analog GND Ground
46 AVCC TMDS Analog VCC (3.3V) Power
47 R0X1- I TMDS Input data for HDMI Port 0. Diffrential Signal
48 R0X1+ I TMDS Input data for HDMI Port 0. Diffrential Signal
49 AGND TMDS Analog GND Ground
50 AVCC TMDS Analog VCC (3.3V) Power
51 R0X2- I TMDS Input data for HDMI Port 0. Diffrential Signal
52 R0X2+ I TMDS Input data for HDMI Port 0. Diffrential Signal
53 AGND TMDS Analog GND Ground
54 TMDSPGND TMDS PLL GND Ground
55 PVCC1 TMDS Port 1 PLL VCC (3.3V) Power
56 RSVD_A Reserved Pin, leave unconnected. Configuration/Programming
57 AVCC TMDS Analog VCC (3.3V) Power
58 R1XC- I TMDS Input Clock for HDMI Port 1. Diffrential Signal
59 R1XC+ I TMDS Input Clock for HDMI Port 1. Diffrential Signal
60 AGND TMDS Analog GND Ground
61 AVCC TMDS Analog VCC (3.3V) Power
62 R1X0- I TMDS Input data for HDMI Port 1. Diffrential Signal
63 R1X0+ I TMDS Input data for HDMI Port 1. Diffrential Signal
64 AGND TMDS Analog GND Ground
65 AVCC TMDS Analog VCC (3.3V) Power
66 R1X1- I TMDS Input data for HDMI Port 1. Diffrential Signal
67 R1X1+ I TMDS Input data for HDMI Port 1. Diffrential Signal
68 AGND TMDS Analog GND Ground
69 AVCC TMDS Analog VCC (3.3V) Power
70 R1X2- I TMDS Input data for HDMI Port 1. Diffrential Signal
71 R1X2+ I TMDS Input data for HDMI Port 1. Diffrential Signal
72 AGND TMDS Analog GND Ground
Analog Video 11 COMP
Compensation. Provides compensation for the
DAC's internal reference amplifier.