PIO-D96 Series Card
96-channel DIO Board
User Manual, Ver. 2.3, Jun. 2018, PMH-008-23 Page: 42
6.3.3
AUX Data Register
(Read/Write): wBase+3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Aux7
Aux6
Aux5
Aux4
Aux3
Aux2
Aux1
Aux0
When the Aux is used for DO, the output state is controlled by this register. This register is designed
for feature extension. Therefore, do not use this register.
6.3.4
INT Mask Control Register
(Read/Write): wBase+5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
EN3
EN2
EN1
EN0
EN0=0
Disable P2C0 of CN1 as an interrupt signal (Default).
EN0=1
Enable P2C0 of CN1 as an interrupt signal
For example:
outportb(wBase+5,0);
/*Disable interrupt */
outportb(wBase+5,1);
/* Enable interrupt P2C0 */
outportb(wBase+5,0x0f);
/* Enable interrupt P2C0, P5C0,P8C0,P11C0 */