l
Modulates and converts the signals to the TX band by up-converting the IF signals, filters
and amplifies the signals, and then transmits the signals to the antenna through the duplexer
l
Receives RF signals from the antenna and performs down-conversion, amplification,
analog-to-digital conversion, digital down-conversion, matched filtering, and Digital
Automatic Gain Control (DAGC), and then transmits the signals to the BBU for further
processing
l
Performs power control
l
Provides Voltage Standing Wave Ratio (VSWR) detection
l
Supplies power to the TMA and controls the RET antenna
l
Controls DPD feedback signals
l
Generates the CPRI clock, recovers the CPRI clock from loss of synchronization, and
detects alarms
Principle
The MRFU consists of the high-speed interface unit, signal processing unit, power amplifier,
and duplex unit.
shows the logical structure of the MRFU.
Figure 4-39
Logical structure of the MRFU
The high-speed interface unit has the following functions:
l
Transmits the signals received from the BBU to the signal processing unit
l
Transmits the signals received from the signal processing unit to the BBU
The signal processing unit consists of two uplink RX channels and one downlink TX channel.
l
The uplink RX channels have the following functions:
–
Down-convert the RF signals to IF signals
–
Amplify the IF signals and performing IQ demodulation
–
Convert analog signals to digital signals
–
Sample digital signals
–
Perform matched filtering
–
Support the digital automatic gain control (DAGC)
4 BTS3900 Components
BTS3900
Hardware Description
4-54
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Issue 04 (2011-02-15)