Pulse Width Capture Mode
In this mode, the Timer/Event Counter can be utilised to measure the width of external pulses applied
to the external timer pin. To operate in this mode, the Operating Mode Select bit pair, T1M1/T1M0, in
the Timer Control Register must be set to the correct value as shown.
Control Register Operating Mode
Select Bits for the Pulse Width Capture Mode
Bit7
Bit6
1
1
In this mode the internal clock, f
SYS
/4 or the LIRC, is used as the internal clock for the 16-bit
Timer/Event Counter. After the other bits in the Timer Control Register have been setup, the enable bit
T1ON, which is bit 4 of the Timer Control Register, can be set high to enable the Timer/Event Counter,
however it will not actually start counting until an active edge is received on the external timer pin.
If the Active Edge Select bit T1EG, which is bit 3 of the Timer Control Register, is low, once a high to
low transition has been received on the external timer pin, the Timer/Event Counter will start counting
until the external timer pin returns to its original high level. At this point the enable bit will be
automatically reset to zero and the Timer/Event Counter will stop counting. If the Active Edge Select
bit is high, the Timer/Event Counter will begin counting once a low to high transition has been
received on the external timer pin and stop counting when the external timer pin returns to its original
low level. As before, the enable bit will be automatically reset to zero and the Timer/Event Counter
will stop counting. It is important to note that in the pulse width capture Mode, the enable bit is
automatically reset to zero when the external control signal on the external timer pin returns to its
original level, whereas in the other two modes the enable bit can only be reset to zero under program
control.
The residual value in the Timer/Event Counter, which can now be read by the program, therefore
represents the length of the pulse received on the TC1 pin. As the enable bit has now been reset, any
further transitions on the external timer pin will be ignored. The timer cannot begin further pulse width
capture until the enable bit is set high again by the program. In this way, single shot pulse
measurements can be easily made.
It should be noted that in this mode the Timer/Event Counter is controlled by logical transitions on the
external timer pin and not by the logic level. When the Timer/Event Counter is full and overflows, an
interrupt signal is generated and the Timer/Event Counter will reload the value already loaded into the
preload register and continue counting. The interrupt can be disabled by ensuring that the Timer/Event
Counter Interrupt Enable bit in the corresponding Interrupt Control Register is reset to zero.
As the TC1 pin is shared with an I/O pin, to ensure that the pin is configured to operate as a pulse width
capture pin, two things have to happen. The first is to ensure that the Operating Mode Select bits in the
Timer Control Register place the Timer/Event Counter in the pulse width capture mode, the second is
to ensure that the port control register configures the pin as an input.
Rev. 1.50
72
April 28, 2020
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
+ 1
+ 2
+ 3
+ 4
T i m e r
E x t e r n a l T C 1
P i n I n p u t
T 1 O N - w i t h T 1 E G = 0
P r e s c a l e r O u t p u t
I n c r e m e n t
T i m e r C o u n t e r
P r e s c a l e r O u t p u t i s s a m p l e d a t e v e r y f a l l i n g e d g e o f T 1 .
Pulse Width Capture Mode Timing Chart (T1EG=0)
