SIMC1 Register
Bit
7
6
5
4
3
2
1
0
Name
HCF
HAAS
HBB
HTX
TXAK
SRW
IAMWU
RXAK
R/W
R
R
R
R/W
R/W
R
R/W
R
POR
1
0
0
0
0
0
0
1
Bit 7
HCF
: I
2
C Bus data transfer completion flag
0: Data is being transferred
1: Completion of an 8-bit data transfer
The HCF flag is the data transfer flag. This flag will be zero when data is being transferred.
Upon completion of an 8-bit data transfer the flag will go high and an interrupt will be generated.
Bit 6
HAAS
: I
2
C Bus address match flag
0: Not address match
1: Address match
The HASS flag is the address match flag. This flag is used to determine if the slave device
address is the same as the master transmit address. If the addresses match then this bit will be
high, if there is no match then the flag will be low.
Bit 5
HBB
: I
2
C Bus busy flag
0: I
2
C Bus is not busy
1: I
2
C Bus is busy
The HBB flag is the I
2
C busy flag. This flag will be
²
1
²
when the I
2
C bus is busy which will
occur when a START signal is detected. The flag will be set to
²
0
²
when the bus is free which will
occur when a STOP signal is detected.
Bit 4
HTX
: Select I
2
C slave device is transmitter or receiver
0: Slave device is the receiver
1: Slave device is the transmitter
Bit 3
TXAK
: I
2
C Bus transmit acknowledge flag
0: Slave send acknowledge flag
1: Slave do not send acknowledge flag
The TXAK bit is the transmit acknowledge flag. After the slave device receipt of 8-bits of data,
this bit will be transmitted to the bus on the 9th clock from the slave device. The slave device
must always set TXAK bit to
²
0
²
before further data is received.
Bit 2
SRW
: I
2
C Slave Read/Write flag
0: Slave device should be in receive mode
1: Slave device should be in transmit mode
The SRW flag is the I
2
C Slave Read/Write flag. This flag determines whether the master device
wishes to transmit or receive data from the I
2
C bus. When the transmitted address and slave
address is match, that is when the HAAS flag is set high, the slave device will check the SRW
flag to determine whether it should be in transmit mode or receive mode. If the SRW flag is high,
the master is requesting to read data from the bus, so the slave device should be in transmit
mode. When the SRW flag is zero, the master will write data to the bus, therefore the slave
device should be in receive mode to read this data.
Bit 1
IAMWU
: I
2
C address match wake-up control
0: disable
1: enable
This bit should be set to
²
1
²
to enable I
2
C address match wake-up from SLEEP or IDLE Mode.
If the IAMWU bit has been set before entering either the SLEEP or IDLE mode to enable the I
2
C
address match wake up, then this bit must be cleared by the application program after wake-up
to ensure correction device operation.
Bit 0
RXAK
: I
2
C Bus Receive acknowledge flag
0: Slave receive acknowledge flag
1: Slave do not receive acknowledge flag
The RXAK flag is the receiver acknowledge flag. When the RXAK flag is
²
0
²
, it means that a
acknowledge signal has been received at the 9th clock, after 8 bits of data have been transmitted.
When the slave device in the transmit mode, the slave device checks the RXAK flag to determine if
the master receiver wishes to receive the next byte. The slave transmitter will therefore continue
sending out data until the RXAK flag is
²
1
²
. When this occurs, the slave transmitter will release the
SDA line to allow the master to send a STOP signal to release the I
2
C Bus.
Rev. 1.50
90
April 28, 2020
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
