Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
f
LIRC
System Clock (LIRC)
5V
¾
-
10%
32
+10%
kHz
2.2V~
5.5V
Ta=
-
40
°
C~+85
°
C
-
50%
32
+60%
kHz
f
TIMER
Timer Input Pin Frequency
¾
¾
¾
¾
1
f
SYS
t
RES
External Reset Low Pulse Width
¾
¾
1
¾
¾
m
s
t
INT
Interrupt Pulse Width
¾
¾
1
¾
¾
m
s
t
LVR
Low Voltage Width to Reset
¾
¾
60
120
240
m
s
t
EERD
EEPROM Read Time
¾
¾
¾
2
4
t
SYS
t
EEWR
EEPROM Write Time
¾
¾
¾
2
4
ms
t
SST
System Start-up Timer Period
(Wake-up from HALT)
¾
f
SYS
=HIRC
¾
15~16
¾
t
SYS
f
SYS
=LIRC
¾
1~2
¾
Note:
1. t
SYS
=1/f
SYS
2. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1
m
F decoupling capacitor should be
connected between VDD and VSS and located as close to the device as possible.
Power-on Reset Characteristics
Ta=25
°
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
POR
VDD Start Voltage to Ensure
Power-on Reset
¾
¾
¾
¾
100
mV
R
POR AC
VDD Raising Rate to Ensure
Power-on Reset
¾
¾
0.035
¾
¾
V/ms
t
POR
Minimum Time for VDD Stays at
V
POR
to Ensure Power-on Reset
¾
¾
1
¾
¾
ms
Rev. 1.50
14
April 28, 2020
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
T i m e
V
D D
V
P O R
R R
V D D
t
P O R
