CTRL Register
Bit
7
6
5
4
3
2
1
0
Name
RESBF
¾
HIRCS1
HIRCS0
¾
¾
¾
¾
R/W
R/W
¾
R/W
R/W
¾
¾
¾
¾
POR
x
¾
0
0
¾
¾
¾
¾
²
x
²
unknown
Bit 7
RESBF
: Reset Pin reset flag -- BS83B08-3/B12-3/B16-3
0: no hardware reset occurred
1: hardware reset occured, this bit is cleared to zero by software.
Bit 6
unimplemented, read as
²
0
²
Bits 5,4
HIRCS1
,
HIRCS0
: High frequency clock select
Described elsewhere
Bits 3~0
unimplemented, read as
²
0
²
Low Voltage Reset
-
LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the device,
which is selected via a configuration option. If the supply voltage of the device drops to within a range of
0.9V~V
LVR
such as might occur when changing the battery, the LVR will automatically reset the device
internally. The LVR includes the following specifications: For a valid LVR signal, a low voltage, i.e., a
voltage in the range between 0.9V~V
LVR
must exist for greater than the value t
LVR
specified in the A.C.
characteristics. If the low voltage state does not exceed t
LVR
, the LVR will ignore it and will not perform a
reset function. One of a range of specified voltage values for V
LVR
can be selected using configuration
options.
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to
²
1
²
and RESBF is unchange.
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
Rev. 1.50
49
April 28, 2020
L V R
I n t e r n a l R e s e t
t
R S T D +
t
S S T
Note: t
RSTD
is power-on delay, typical time=50ms for BS83C24-3, =100ms except BS83C24-3.
Low Voltage Reset Timing Chart
t
R S T D +
t
S S T
W D T T i m e - o u t
I n t e r n a l R e s e t
Note: t
RSTD
is power-on delay, typical time=50ms for BS83C24-3, =100ms except BS83C24-3.
WDT Time-out Reset during Normal Operation Timing Chart
