Slave Address
The transmission of a START signal by the master will be detected by all devices on the I
2
C bus. To
determine which slave device the master wishes to communicate with, the address of the slave device
will be sent out immediately following the START signal. All slave devices, after receiving this 7-bit
address data, will compare it with their own 7-bit slave address. If the address sent out by the master
matches the internal address of the microcontroller slave device, then an internal I
2
C bus interrupt
signal will be generated. The next bit following the address, which is the 8th bit, defines the read/write
status and will be saved to the SRW bit of the SIMC1 register. The slave device will then transmit an
acknowledge bit, which is a low level, as the 9th bit. The slave device will also set the status flag
HAAS when the addresses match.
As an I
2
C bus interrupt can come from two sources, when the program enters the interrupt subroutine,
the HAAS bit should be examined to see whether the interrupt source has come from a matching slave
address or from the completion of a data byte transfer. When a slave address is matched, the device
must be placed in either the transmit mode and then write data to the SIMD register, or in the receive
mode where it must implement a dummy read from the SIMD register to release the SCL line.
I
2
C Bus Read/Write Signal
The SRW bit in the SIMC1 register defines whether the slave device wishes to read data from the I
2
C
bus or write data to the I
2
C bus. The slave device should examine this bit to determine if it is to be a
transmitter or a receiver. If the SRW flag is
²
1
²
then this indicates that the master device wishes to read
data from the I
2
C bus, therefore the slave device must be setup to send data to the I
2
C bus as a
transmitter. If the SRW flag is
²
0
²
then this indicates that the master wishes to send data to the I
2
C bus,
therefore the slave device must be setup to read data from the I
2
C bus as a receiver.
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
Rev. 1.50
93
April 28, 2020
D a t a
1
0
1
0
0
1
0
0
1
0
0
1
0
1
0
1
1
S = S t a r t ( 1 b i t )
S A = S l a v e A d d r e s s ( 7 b i t s )
S R = S R W b i t ( 1 b i t )
M = S l a v e d e v i c e s e n d a c k n o w l e d g e b i t ( 1 b i t )
D = D a t a ( 8 b i t s )
A = A C K ( R X A K b i t f o r t r a n s m i t t e r , T X A K b i t f o r r e c e i v e r 1 b i t )
P = S t o p ( 1 b i t )
S C L
S t a r t
S D A
S R W
A C K
A C K
S t o p
S C L
S D A
S l a v e A d d r e s s
S
S A
S R
M
D
A
D
A
S
S A
S R
M
D
A
D
A
P
Note:
* When a slave address is matched, the device must be placed in either the transmit mode and then write data
to the SIMD register, or in the receive mode where it must implement a dummy read from the SIMD register to
release the SCL line.
I
2
C Communication Timing Diagram
