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Rev. 1.20
31
October 28, 2020
BC45B4523
Bit 1
ADC_Rsln
: ADC resolution setup
0: 7 bits – 10.6mV
1: 8 bits – 5.3mV
This bit is used to configure the ADC resolution which defines RF amplitude input at RX pin, Refer to
the “RF Amplitude Detector System” section for more details. The defined resolution is based on RF
input signal which is in phase with internal clock and ADC_FullscaleAdj (Sector1-0x05.[1:0])=“00”.
Bit 0
Reserved bit for internal setting, this bit must be fixed at “1” and can not be modified
• ADC_Result_I Register
This register contains the ADC conversion output, I-phase, in phase with reference clock.
Address
Bit
7
6
5
4
3
2
1
0
0x26
Name
ADC_Result_I[7:0]
Type
R
Reset Value
0
0
0
0
0
0
0
0
Bit 7~0
ADC_Result_I[7:0]
: ADC Conversion output, I – phase, which defines RF amplitude at pin RX from
FieldDetect and CardDetect
• ADC_Result_Q Register
This register contains the ADC conversion output, Q-phase, quadrature phase of reference clock.
Address
Bit
7
6
5
4
3
2
1
0
0x27
Name
ADC_Result_Q[7:0]
Type
R
Reset Value
0
0
0
0
0
0
0
0
Bit 7~0
ADC_Result_Q[7:0]
: ADC Conversion output, Q – phase, which defines RF amplitude at pin RX from
FieldDetect and CardDetect
Sector 0 – Page 5: FIFOLevel, Program Timer and Wake Up Timer
• FIFOLevel Register
This register is used to define the level of FIFO for overflow and underflow warning.
Address
Bit
7
6
5
4
3
2
1
0
0x29
Name
—
—
WaterLevel[5:0]
Type
—
—
R/W
Reset Value
—
—
0
0
1
0
0
0
Bit 7~6 Unimplemented, read as “0”
Bit 5~0
WaterLevel[5:0]
: Define the level of FIFO for overflow and underflow warnings
• TimerClock Register
This register is used to define the input clock to the timer and control the timer reloading.
Address
Bit
7
6
5
4
3
2
1
0
0x2A
Name
—
—
TAutoRestart
TPreScaler[4:0]
Type
—
—
R/W
R/W
Reset Value
—
—
0
0
0
1
1
1
Bit 7~6 Unimplemented, read as “0”
Bit 5
TAutoRestart
: Timer auto restart control
0: The timer decreases to zero and the bit TimerIRq is set to 1
1: The program timer automatically restarts and counts down from TReloadValue, instead of counting
down to zero