Table 9: Interrupts
Hardware IRQ
IRQ Source
INTC1
IRQ00
System Timer
IRQ01
Keyboard
IRQ02
Cascade from INTC2
IRQ03
COM2 / COM1
a
IRQ04
COM1 / COM2
a
IRQ05
IRQ06
IRQ07
INTC2
IRQ08
Real Time Clock
IRQ09
Power Management Contr./PCI
b
IRQ10
PnP/PCI
b
IRQ11
PnP/PCI
b
IRQ12
PS/2 Mouse
c
IRQ13
Numeric Coprocessor
IRQ14
SATA
IRQ15
NMI
Parity Error,
ECC Error,
System Error
a
. This interrupt is available when no Interrupt Service Routine is installed.
b
. Interrupts are available for Plug and Play PCI devices
c
. This interrupt is available when PS/2 mouse is not connected.
d
. This interrupt is available when the primary IDE is disabled in SETUP.
e
. This interrupt is available when the secondary IDE is disabled in SETUP.
APIC Controller
The ASLP11 supports also the Interrupt handlings with APIC (Advanced
Interrupt Controller). This handling of the APIC interrupt services must be
supported by the operating system. The I/O APIC handles interrupts very
differently than the 8259. Briefly, these differences are:
•
Method of Interrupt Transmission.
The I/O APIC transmits interrupts
through a three wire bus, and interrupts are handled without the need for the
processor to run an interrupt acknowledge cycle.
•
Interrupt Priority.
The priority of interrupts in the I/O APIC is
independent of the interrupt number. For example, interrupt 10 may be given
a higher priority than interrupt 3.
•
More Interrupts.
The I/O APIC in the Intel
3100 supports a total of 24
interrupts.
GE Intelligent Platforms – ASLP11 Hardware Reference Manual, Third Edition
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