GE MAC 5500, Руководство по обслуживанию

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Revision E MAC

5500 resting ECG analysis system 2-15

2020299-020
Equipment Overview: Theory of Operation
A copy of the primary boot program (pages with ID “Bn” where n is the 3-bit PCB
ID code 1-8) is kept in NAND flash. This is updated whenever a software update
happens. For -006 and -007 boards, the FPGA image and Primary boot code image
ID’s are X3 and B3 respectively.
The primary boot program can do a forceful software update, even if a valid
program is present in the NAND Flash, by using a special SD Card, which has a file,
update.com, in the root directory. The service menu provides a provision to update
the SPI data flash with the primary boot program copy residing the NAND Flash.
FPGA Internal Logic
All of the MAC

5500 resting ECG analysis system’s proprietary hardware is
contained in a single Xilinx FPGA that contains:
 XBus Controller

Video Interface
 LCD Controller with SDRAM frame buffer

Video Waveform Scroller
 Interrupt Controller

System Interrupt Generator
 Acquisition Module Interface

Thermal Printhead Interface
 Serial EEPROM Interface

BBus Interface
 Four PWM Analog Outputs

Beep Generator
On On Error - Could not program all the image files
as well as the status page 'Z0'.
On Flashing Error - Could not program all the image files.
But the status page 'Z0' updated successfully
DS1 Red DS2 (Green) Status