Fujitsu MPG3102AH, Руководство по эксплуатации продукта

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C141-E112-01EN 4 - 10
4.6 Read/write Circuit
The read/write circuit consists of the read/write preamplifier (PreAMP), the write circuit, the read
circuit, and the synthesizer in the read channel (RDC).
4.6.1 Read/write preamplifier (PreAMP)
One PreAMP is mounted on the FPC. The PreAMP consists of an 4-channel read preamplifier
and a write current switch and senses a write error. Each channel is connected to each data head.
The head IC switches the heads by the serial port (SDEN, SCLK, SDATA). The IC generates a
write error sense signal (WUS) when a write error occurs due to head short-circuit or head
disconnection.
4.6.2 Write circuit
The write data is output from the hard disk controller (HDC) with the NRZ data format, and sent
to the encoder circuit in the RDC with synchronizing with the write clock. The NRZ write data is
converted from 48-bits data to 52-bits data by the encoder circuit then sent to the PreAMP, and
the data is written onto the media.
(1) 48/52 GCR
The disk drive converts data using the 48/52 group coded recording (GCR) algorithm.
(2) Write precompensation
Write precompensation compensates, during a write process, for write non-linearity generated at
reading.