Freescale Semiconductor 56F8300 Series, Руководство пользователя

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CAN Interface
Technical Summary, Rev. 1
Freescale Semiconductor 2-21
Preliminary
2.13 CAN Interface
The 56F8357EVM board contains a CAN physical-layer interface chip that is attached to the
FlexCAN port’s CAN_RX and CAN_TX pins on the 56F8357. The EVM board uses a Phillips
high-speed, 1.0Mbps, physical layer interface chip, PCA82C250. Due to the +5.0V operating
voltage of the CAN interface chip, a pull-up to +5.0V is required to level shift the Transmit Data
output line from the 56F8357. The CANH and CANL signals pass through inductors before
attaching to the CAN bus connectors. A primary, J20, and daisy-chain, J21, CAN connector are
provided to allow easy daisy-chaining of CAN devices. CAN bus termination of 120 ohms can be
provided by adding a jumper to JG13. Refer to
Table 2-13 for the CAN connector signals and
Figure 2-11 for a connection diagram.
Figure 2-11. CAN Interface
Table 2-13. CAN Header Description
J20 and J21
Pin # Signal Pin # Signal
1 NC 2 NC
3 CANL 4 CANH
5 GND 6 NC
7 NC 8 NC
9 NC 10 NC
56F8357
+5.0V
CAN Transceiver
J20
Daisy-Chain CAN
Connector
J21
CAN Bus
Connector
CAN Bus
Terminator
JG13
120
PCA82C250
1K
CAN_TX
CAN_RX
1
2
3
4
5
4
3
5
CANH
CANL
TXD
RXD