CPC522
C P C 5 2 2 U s e r M a n u a l
25
© 2 0 2 2 F a s t w e l V e r . 0 0 1
3:0
Interrupt_select
Write/Read:
00h
– interrupt is disabled
01h
– IRQ1 02h – SMI
03h
– IRQ3
04h
– IRQ4
05h
– IRQ5
06h
– IRQ6
07h
– IRQ7
08h
– IRQ8 (interrupt is disabled)
09h
– IRQ9
0ah
– IRQ10
0bh
– IRQ11
0ch
– IRQ12
0dh
– IRQ13 (interrupt is disabled)
0eh
– IRQ14 (interrupt is disabled)
0fh
– IRQ15 (interrupt is disabled)
Timer Init register
Index = F1h
Bit
Name
Description
7:5
-
Not used
4
P80E
Write/Read: counter reset during
writing to port 80h
1
– enabled
0
–disabled
3
WND2_WR_EN
Write/Read:
Counter reset during write cycle to the window 2
1
– enabled
0
– disabled
2
WND2_RD_EN
Write/Read:
Counter reset during read cycle to window 2
1
– enabled
0
– disabled
1
WND1_WR_EN
Write/Read:
Counter reset during write cycle to the window 1
1
– enabled
0
– disabled
0
WND1_RD_EN
Write/Read:
Counter reset during read cycle from window 1
1
– enabled
0
– disabled
Window 1 port base address registers
Index = F2h
Bit
Name
Description