CPC522
C P C 5 2 2 U s e r M a n u a l
24
© 2 0 2 2 F a s t w e l V e r . 0 0 1
61h
-
R/W
Base[7:3] - I/O port base address bits[7:3]
Base[2:0]
– must be 0;
70h
-
R/W
00h
Primary interrupt select
F0h
-
R/W
00h
Reserved
F1h
-
R/W
00h
Timer Init Register
F2h
-
R/W
00h
Window 1 base address bits[7:0]
F3h
-
R/W
00h
Window 1 base address bits[15:8]
F4h
-
R/W
00h
Window 2 base address bits[7:0]
F5h
-
R/W
00h
Window 2 base address bits[15:8]
F6h
-
R/W
FFh
Window 1 Mask bits [7:4] Window
2 Mask bits [3:0]
Activate register
Index = 30h
Bit
Name
Description
7:1
-
Not used
0
Activate
Write/Read:
1
– This logical device is enabled
0
– This logical device is disabled
I/O port base address registers
Index = 60h
Bit
Name
Description
7:0
I/O_Base_Adress[15:8]
Write/Read:
Bits 15:8 of the base address of the current logical device
Index = 61h
Bit
Name
Description
7:0
I/O_Base_Adress[7:0]
Write/Read:
Bits 7:0 of the base address of the current logical device
Primary interrupt select register (index 70h)
Index = 70h
Bit
Name
Description
7:4
-
Not used