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CPC505
C P C 5 0 5 U s e r M a n u a l
13
© 2 0 2 2 F a s t w e l v . 0 0 1
Rate up to 100 Kb/sec;
Flash BIOS
:
2x128 Mb SPI-Flash;
Modifiable in the system.
FRAM
:
Capacity 32 KB;
Implemented on SPI bus;
Integrated SATA SSD
:
Capacity 32 GB;
Interface SATA III 6 Gb/sec;
Support of the drives of M.2 2280 standard (PCIe x4 Gen3)
;
SATA interface
:
One interface is routed to the P16 XMC connector;
One interface is used for the connection of integrated SSD;
Two interfaces are routed to RIO;
SPI interface
:
FRAM support;
Frequency up to 25 MHz;
4 x LAN 10/100/1000 Mb ports on PCIe x4 Gen2
:
Two channels are routed to RIO connector;
Two channels are routed to the P16 XMC connector;
Support of the PICMG 2.16 standard;
Intel® Ethernet Controller I350 is used;
2 x LAN 10/100/1000/2500 Mb ports on i225 controllers
:
Support of rates up to 2.5 Gb/sec. on 5
е cat. cable;
USB ports
:
Support of USB 2.0 (480 Mb/sec), USB 3.0 (5 Gb/sec), USB 3.1 (10 Gb/sec);
Connection of up to 4 x devices via front panel connectors (USB 3.0);
2 x interfaces USB 3.1 are routed to the P16 XMC connector;
6 x USB 2.0 interfaces are routed to RIO;
Real Time Clock
:
Powered from the lithium battery CR2032 (3V);
Audio support
:
HD Audio interface is routed to the P16 XMC and RIO connectors;
COM port
:
The COM0 port is routed to the connector on the board, and a D-SUB plug can
be installed in the XMC mezzanine front panel cutout if necessary. In this case
using the XMC mezzanine is not possible;
Watchdog Timer
:
Internal, with program control possibility;
Hardware monitor
: