Page 40
Appendix F Diagnostics
BD500 Broadcast Profanity Delay
©Eventide Inc. 1995-1999
doc release 10
D22
During DSP_START2, the driver for motherboard to co-
processor receive communications determined that the
coprocessor was hung up processing the previous mes-
sage (TxRDY/TxEMPTY). This indicates that the copro-
cessor did something or that the motherboard program
has a bug. Since this happened after the first time the
coprocessor was sucessfully accessed we can guess that
either a bug exists in the DSP boot code or there is an
intermittent problem in the coprocessor<->motherboard
processor host port or with the coprocessor CPU itself.
The coprocessor external memory is not involved in this
failure.
D23
During DSP_START2 the motherboard processor deter-
mined that we arrived at a programming instruction wait-
ing for the coprocessor to finish processing a hardware
interrupt previously issued by the motherboard. The driver
indicating the error is attempting to recieve a word from
the coprocessor during sethosreadptr, part of the copro-
cessor to motherboard communications driver. We
shouldn't get to this condition because the previous driver
that would have issued that hardware interrupt would not
have exited without the interrupt being cleared. This
means that the coprocessor went back into the interrupt
state (CVR full) without the motherboard CPU initiating it,
or that the motherboard program has a bug. Since this
happened after the first time the coprocessor was
sucessfully accessed we can guess that either a bug ex-
ists in the DSP boot code or there is an intermittent prob-
lem in the coprocessor<->motherboard processor host
port or with the coprocessor CPU itself. The coprocessor
external memory is not involved in this failure.
D24
This is the opposite of D23. This error occurs when wait-
ing to leave sethostreadptr, part of the coprocessor/moth-
erboard receive drivers. This error, issued only during
DSP_START2, indicates that the coprocessor was sent a
hardware interrupt to transmit a data word and the copro-
cessor never accepted the hardware interrupt. This means
that the coprocessor is locked up with interrupts disabled,
or that there is a hardware function in the motherboard to
coprocessor communications, or that the software on the
motherboard processor is wrong. Since this happened
after the first time the coprocessor was sucessfully ac-
cessed we can guess that either a bug exists in the DSP
boot code or there is an intermittent problem in the copro-
cessor<->motherboard processor host port or with the
coprocessor CPU itself. The coprocessor external memory
is not involved in this failure.
D25
This is the opposite of D22. This error occurs during
DSP_START2 when waiting to leave sethostreadptr, part
of the coprocessor/motherboard receive drivers. This er-
ror, issued only during startup, indicates that the copro-
cessor was sent an address word and the coprocessor
never read the word, clearing the TxRDY/TxEMPTY bits..
This means that the coprocessor receiver program is not
functioning. Since this happened after the first time the
coprocessor was sucessfully accessed we can guess that
either a bug exists in the DSP boot code or there is an
intermittent problem in the coprocessor<->motherboard
processor host port or with the coprocessor CPU itself.
The coprocessor external memory is not involved in this
failure.
D26
This error occurs during DSP_START2 when waiting to
leave sethostreadptr, part of the coprocessor/motherboard
receive drivers. This error, issued only during DSP-
START2, indicates that the coprocessor was sent the ad-
dress word and the coprocessor read the address word,
but never sent the first data word. This means that the
coprocessor receiver program is not functioning. Since
this happened after the first time the coprocessor was
sucessfully accessed we can guess that either a bug ex-
ists in the DSP boot code or there is an intermittent prob-
lem in the coprocessor<->motherboard processor host
port or with the coprocessor CPU itself. The coprocessor
external memory is not involved in this failure.
D27
This error indicates a firmware error on the motherboard
processor. The error was reported during DSP_START2
(coprocessor startup) when a part of the motherboard pro-
cessor driver to write to the coprocessor was called dur-
ing a read sequence.
D28
This error indicates a firmware error on the motherboard
processor. The error was reported during DSP_START2
when a part of the motherboard processor driver to read
from the coprocessor was called during a write sequence.
D30
During DSP_START2 a test program is uploaded from the
motherboard processor. This error message indicates that
communications with the coprocessor is working ok but
that the readback of the first test word from the internal
memory on the coprocessor chip failed. The external co-
processor memory is not involved.
D31
This is the same as D30 except that the first readback
worked and the second failed. The external coprocessor
memory is not involved.
D32
This is the same as D30 except that after the 1st and 2nd
readbacks worked, we read back the entire boot program
and got a verification error. Note that the main processor
<-> coprocessor communications functions on both sides
of the link are working apparently, but that the verification
failed anyway. Also note that the program that failed to
verify was uploaded into the coprocessor's internal
memory. The external coprocessor memory is not in-
volved.
D33
After the first program was uploaded and verified, the 1st
memory test program is uploaded. This error is the same
as D30 except that it is after the communications has been
rigorously tested.
D34
This is the same as D33 except that the first readback
worked and the second failed. The external coprocessor
memory is not involved.
D35
This error message means that the 1st memory test pro-
gram was not uploaded successfully. The program was
read back and showed to have errors during upload. This
is not supposed to happen.
D36
This is the same as D33 except that we were doing the
1st readback from the 2nd memory test program.
D37
This is the same as D36 except that we were doing the
2nd readback.
D38
This error message means that the 2nd memory test pro-
gram was not uploaded successfully. The program was
read back and showed to have errors during upload. This
is not supposed to happen.
Содержание BD500
Страница 1: ......
Страница 2: ......
Страница 4: ......
Страница 16: ...Page 12 Chapter 2 Operation BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 22: ...Page 18 Chapter 3 Configuration BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 26: ...Page 22 Appendix B Basic Remote Control BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 50: ...Page 46 Appendix G Specifications BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...