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Page 38
Appendix F Diagnostics
BD500 Broadcast Profanity Delay
©Eventide Inc. 1995-1999
doc release 10
A89
During startup the coprocessor is initialized with the boot
software, having passed several tests. In this part of the
program the sample clock interrupt signal to the copro-
cessor is being tested. This error indicates that the sample
clock is running faster than it should, given the current
motherboard sample clock setting. Check the audio card,
DSP card and sample clock generator.
A90
During startup the coprocessor is initialized with the boot
software, having passed several tests. In this part of the
program the sample clock interrupt signal to the copro-
cessor is being tested. This error indicates that the sample
clock is not running at all, even though the current moth-
erboard sample clock setting has it that it should. Check
the audio card, DSP card and sample clock generator.
A91
This error message indicates that during startup the co-
processor has complained many times about getting an
audio card interrupt many times while the coprocessor
was busy processing an earlier audio card interrupt .
Normally a redundant audio card interrupt could indicate
that the sample rate glitched (not unlikely if using AES/
EBU). This is not supposed to happen many times in a
short period however.
A94
During startup the UI sent a bad command to the copro-
cessor drivers. This would indicate a firmware error.
A95
During startup the auxiliary port driver (delayed control
lines) reported that the delay amount is longer than al-
lowed. This would indicate a firmware error.
D00->D11 During DSP_START1 (coprocessor startup) the co-
processor malfunctioned. Since this happened the very
first time the coprocessor was addressed we can guess
that it did not start running the boot code. This failure
indicates a problem with the coprocess<->motherboard
processor host port or with the coprocessor CPU itself.
The coprocessor external memory is not involved in this
failure.
D00
During DSP_START1 (coprocessor startup) a failure was
reported by the motherboard processor where it appears
the coprocessor failed to receive a word of information
from the motherboard. The motherboard processor even-
tually got tired of waiting. This failure indicates a problem
with the coprocess<->motherboard processor host port
or with the coprocessor CPU itself. The coprocessor ex-
ternal memory is not involved in this failure.
D01
During DSP_START1 (coprocessor startup) a failure was
reported by the motherboard processor where it appears
the motherboard processor was waiting for the coproces-
sor to transmit a word of information to the motherboard
when it gave up waiting and generated this error mes-
sage. This failure indicates a problem with the coprocess<-
>motherboard processor host port or with the coproces-
sor CPU itself. The coprocessor external memory is not
involved in this failure.
D02
During DSP_START1 the motherboard processor deter-
mined that we arrived at a programming instruction wait-
ing for the coprocessor to finish processing a data word
transmission previously issued by the motherboard. We
shouldn't get here because the previous process that
would have issued that hardware interrupt would not have
exited without the dataword transmission being cleared.
This means that the coprocessor trashed it's own incom-
ing data bits (TxRDY/TxEMPTY) without the motherboard
CPU initiating it, or that the motherboard program has a
bug and somehow got out of the transmit function without
waiting for the data bits to be clear.
D03
During DSP_START1 the motherboard processor deter-
mined that the coprocessor was in a bad state. The co-
processor has a pending hardware interrupt (CVR full)
that should have been handled already. The driver indi-
cating the error is sethostwriteptr, part of the system to
transmit a word to the coprocessor. We shouldn't to this
condition because the previous motherboard driver that
would have issued that hardware interrupt would not have
exited without the interrupt being cleared. This failure
indicates a problem with the coprocess<->motherboard
processor host port or with the coprocessor CPU itself.
The coprocessor external memory is not involved in this
failure.
D04
This is the opposite of D03. This error occurs when wait-
ing to leave sethostwriteptr, part of the coprocessor/moth-
erboard processor transmit driver. This error, issued only
during DSP_START1, indicates that the coprocessor was
sent a hardware interrupt to receive a data word and the
coprocessor never accepted the hardware interrupt. This
failure indicates a problem with the coprocess<->mother-
board processor host port or with the coprocessor CPU
itself. The coprocessor external memory is not involved
in this failure.
D05
This is the opposite of D02. This error occurs during
startup when waiting to leave sethostwriteptr, part of the
motherboard to coprocessor communications suite. This
error, issued only during DSP_START1, indicates that the
coprocessor was sent a data word and the coprocessor
never read the word, clearing the TxRDY/TxEMPTY bits..
This failure indicates a problem with the coprocess<-
>motherboard processor host port or with the coproces-
sor CPU itself. The coprocessor external memory is not
involved in this failure.
D07
During DSP_START1, the driver for motherboard to co-
processor receive communications determined that the
coprocessor was hung up processing the previous mes-
sage (TxRDY/TxEMPTY). This failure indicates a prob-
lem with the coprocess<->motherboard processor host
port or with the coprocessor CPU itself. The coprocessor
external memory is not involved in this failure.
D08
During DSP_START1 the motherboard processor deter-
mined that we arrived at a programming instruction wait-
ing for the coprocessor to finish processing a hardware
interrupt previously issued by the motherboard. The driver
indicating the error is attempting to recieve a word from
the coprocessor during sethosreadptr, part of the copro-
cessor to motherboard communications driver. We
shouldn't get to this condition because the previous driver
that would have issued that hardware interrupt would not
have exited without the interrupt being cleared. This
means that the coprocessor went back into the interrupt
state (CVR full) without the motherboard CPU initiating it,
or that the motherboard program has a bug. This failure
indicates a problem with the coprocess<->motherboard
processor host port or with the coprocessor CPU itself.
The coprocessor external memory is not involved in this
failure.
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Страница 16: ...Page 12 Chapter 2 Operation BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 22: ...Page 18 Chapter 3 Configuration BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 26: ...Page 22 Appendix B Basic Remote Control BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...
Страница 50: ...Page 46 Appendix G Specifications BD500 Broadcast Profanity Delay Eventide Inc 1995 1999 doc release 10 ...