ESD V.2030.01, Руководство по оборудованию, Страница: 23 / 41

Technical Data
6.13 Health
System for monitoring of the board's status.
Voltages Core voltage: 1.0 V,
1.2 V,
1.35 V, 1.8 V,
3.3 V,
0,675 V, 5 V
_USB
,
5 V
_PMC
,
XMC_VPWR
Temperature monitor 4x I²C temperature sensors,
1x CPU integrated temperature diode
Boot Overwrite the SPI FLASH for selection, GPIO expander for various
control functions
Digital IO expansion For „Sideband“ signals of the PMC/XMC bus as for example:
Global Addressing, Root, Monarch, Wake, Reset_OUT, FPGA_Boot
Board Type Indication of XMC-CPU/T10 version and board revision.
Table 18: Data of the health controller
6.14 Memory - Interface
Number 1 SPI interface
Controller integrated in CPU
Physical Interface 3.3 Volt, only internal on the board
Bit rate > 25 MBit/sec
Usage “Das U-Boot” Image for the CPU
Table 19: Data of the memory interface
6.15 Software Support
The flash memory carries the standard boot program “Das U-Boot” and enables the XMC-CPU/T10
to boot various operating systems from network or on-board SPI-Flash.
BSPs are available from esd as described in the “Order Information” on page 40.
The BSPs include an example source code for the FPGA. Programming of the FPGAs is done via
XILINX Toolchain. See
www.xilinx.com for further information.
Loading of the FPGA image is done via “Das U-Boot” command (see page 38).
For the FPGA an esdACC (esd Advanced CAN Controller) implementation is available.
The esd EtherCAT master is available for the BSPs developed by esd (see page 40).
For detailed information about the driver availability for your operating system, please contact our
sales team:
sales@esd.eu
XMC-CPU/T10 Hardware Manual • Doc. No.: V.2030.21 / Rev. 1.2 Page 23 of 41