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Seiko Epson Corporation
S1C17 CORE MANUAL
(REV. 1.2)
sub
%rd, %rs
sub/c %rd, %rs
sub/nc %rd, %rs
Function
16-bit subtraction
Standard)
rd
(15:0)
←
rd
(15:0) -
rs
(15:0),
rd
(23:16)
←
0
Extension 1)
rd
(15:0)
←
rs
(15:0) -
imm13
(zero extended),
rd
(23:16)
←
0
Extension 2)
rd
(15:0)
←
rs
(15:0) -
imm16
,
rd
(23:16)
←
0
Code
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 1 1 0
r d
1 0 1 0
r s
sub
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0 0 1 1 1 0
r d
0 0 1 0
r s
sub/c
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0 0 1 1 1 0
r d
0 1 1 0
r s
sub/nc
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Flag
IL IE C V Z N
– –
↔
↔
↔
↔
sub
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– – –
↔
↔
↔
sub/c
,
sub/nc
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Mode
Src: Register direct
%rs
=
%r0
to
%r7
Dst: Register direct
%rd
=
%r0
to
%r7
CLK
One cycle
Description
(1) Standard
sub %rd,%rs
; rd
←
rd - rs
The content of the
rs
register is subtracted from the
rd
register. The operation is performed in
16-bit size, and bits 23–16 of the
rd
register are set to 0.
(2) Extension 1
ext imm13
sub %rd,%rs
; rd
←
rs - imm13
The 13-bit immediate
imm13
is subtracted from the
rs
register after being zero-extended, and
the result is loaded into the
rd
register. The operation is performed in 16-bit size, and bits 23–16
of the
rd
register are set to 0. The content of the
rs
register is not altered.
(3) Extension 2
ext imm3
;
imm3(2:0) = imm16(15:13)
ext imm13
; = imm16(12:0)
sub %rd,%rs
; rd
←
rs - imm16
The 16-bit immediate
imm16
is subtracted from the
rs
register, and the result is loaded into the
rd
register. The operation is performed in 16-bit size, and bits 23–16 of the
rd
register are set to 0.
The content of the
rs
register is not altered.
(4) Conditional execution
The
/c
or
/nc
suffix on the opcode specifies conditional execution.
sub/c
Executed as
sub
when the C flag is 1 or executed as
nop
when the flag is 0
sub/nc
Executed as
sub
when the C flag is 0 or executed as
nop
when the flag is 1
In this case, the
ext
instruction can be used to extend the operand.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the “d” bit. In this case, extension of the immediate by the
ext
instruction cannot be performed.
Example
(1)
sub %r0,%r0
; r0 = r0 - r0
(2)
ext 0x1
ext 0x1fff
sub %r1,%r2
; r1 = r2 - 0x3fff