U-Boot
ATCA-F140 Installation and Use (6806800M67H)
111
5.8.2
Controlling the Execution of the POST
The environment variable
post_control
allows to configure when POST is executed.
Possible values of
post_control
and their meaning are described in the following table.
RTC
Checks whether the second counter is advancing.
Compares the number of CPU ticks in one second
against the expected system clock frequency (66 MHz)
MDIO/PHY
Attempts to read model and device ID from PHY address
0..3
TSEC network port
The PHY for each TSEC port is configured to loop back
mode, 100 and 1000 MBPS, and 10000 loop back
packets are sent and verified.
Boot flash
Flash devices are sent into CFI query mode and the
query string is verified.
RTM
Check connectivity of 10G repeater devices on RTM
Table 5-6 POST Routines (continued)
Device
Description
Table 5-7 Environment Variable post_control
Value
Description
off
Disables POST altogether
always
POST is executed after all types of blade resets
hard
POST is executed only after hard resets. A hard reset is a
reset of the entire payload and can be issued by the
following reset sources:
Watchdog inside CPU
Boot sequence failure
Software
Face plate reset key
A hard reset is NOT an CPU internal reset, such as a reset
issued through the U-Boot command
reset
or the
Linux command
reboot
.
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