Emerson 6806800M67H, Инструкция по установке и эксплуатации

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Functional Description
ATCA-F140 Installation and Use (6806800M67H)
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4.14 JTAG Support
The ATCA-F140 JTAG configuration consists of multiple JTAG chains controlled by a JTAG
multiplexer. This device has 7 local JTAG slave ports. The ATCA-F140 has devices which reside
in the 3.3V management power and the 12V payload power domains. The JTAG multiplexer,
the power control CPLD and the H8S processor are powered from 3.3V management power.
The rest of the JTAG devices are powered from payload power.
When the Asset JTAG programming cable is installed on the header, the payload power bypass
enable signal is grounded, enabling the +12V payload power supply and each of the onboard
point of load supplies. This allows all of the JTAG devices to be accessed regardless of the state
of the power control CPLD.
Dual Optical PHY
BCM8727 LASI1_L-
LASI2_L 1-2 OPTICAL_PHY_INT
_L FPGA
(ORed) Active Low LVTTL 3.3 9
Optical PHY 1
BCM84740-1 LASI_L
Optical PHY 2
BCM84740-2 LASI_L
QSFP+ Module 1 INT_L
QSFP+ Module 2 INT_L
IPMC LPC SERIRQ To FPGA LPC
interface only 10
Persistent Memory FPGA IRQ11_L FPGA Active Low LVTTL 3.3 11
Table 4-9 Interrupt Mapping (continued)
Interrupt Source Port Signal Source Type Voltage
P2020
IRQ
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