Emerson 6806800M67H, Инструкция по установке и эксплуатации

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Functional Description
ATCA-F140 Installation and Use (6806800M67H)
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4.5.1 Serial Configuration PROM
The FPGA is configured at power up by loading the contents of the SPI PROM device. This
configuration uses standard SPI flashes. For applications that demand fault recovery during
remote upgrade of the FPGA PROM, the ATCA-F140 board provides a build option to install a
backup device. Both PROMs are programmed with identical images during production
process. The IPMI infrastructure can be used to select the secondary boot device. The primary
PROM device is selected by default.
The SPI device chain also includes the SPI devices for the BCM8727 and BCM84740 microcode
so they can be upgraded by the service processor.
There are six different modes of operation for the serial configuration PROM:

FPGA Configuration - The FPGA automatically controls the CSO_B, CCLK and MOSI pins
and reads the configuration data over DIN. Whether the configuration data is supplied by
SPI Flash 1 or 2 is determined by the routing of the CSO_B signal which is controlled by the
IPMC. AUX_SS1 and AUX_SS2 are deasserted by virtue of the fact the FPGA is not
configured.

FPGA Configuration Flash programming - A SPI controller in the FPGA (driven by the service
processor over the local bus) controls CSO_B, CCLK and MOSI, and monitors DIN. The IPMC
controls the chip select routing to determine which of SPI Flash 1 or 2 is programmed.
AUX_SS1 and AUX_SS2 are deasserted by the SPI controller.

BCM8727 microcode Flash programming - The same SPI controller in the FPGA is used as
with configuration Flash programming, but now AUX_SS1 is driven instead of CSO_B
(which is deasserted), allowing SPI Flash 3 to be programmed.

BCM84740 microcode Flash programming - The same SPI controller in the FPGA is used as
with configuration Flash programming, but now AUX_SS2 is driven instead of CSO_B
(which is deasserted), allowing SPI Flash 4 to be programmed.

BCM8727 microcode loading - The SPI port from the BCM8727 is routed to AUX_CS, CCLK,
MOSI and DIN pins in the FPGA to allow the microcode to be read from SPI Flash 3.

BCM84740 microcode loading - The SPI port from the BCM84740 devices are routed to
AUX_CS, CCLK, MOSI and DIN pins in the FPGA to allow the microcode to be read from SPI
Flash 4.
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